| Message ID | 1420780407-33803-1-git-send-email-b18965@freescale.com |
|---|---|
| State | Changes Requested |
| Delegated to: | York Sun |
| Headers | show |
On 01/08/2015 09:13 PM, Alison Wang wrote: > There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id > for using the same SMMU3 on LS1021A. > > Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> > Signed-off-by: Alison Wang <alison.wang@freescale.com> > --- > arch/arm/include/asm/arch-ls102xa/config.h | 1 + > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 37 ++++++++++++++ > .../include/asm/arch-ls102xa/ls102xa_stream_id.h | 57 ++++++++++++++++++++++ > board/freescale/common/ls102xa_stream_id.c | 15 ++++++ > board/freescale/ls1021aqds/ls1021aqds.c | 21 ++++++++ > board/freescale/ls1021atwr/ls1021atwr.c | 21 ++++++++ > 6 files changed, 152 insertions(+) > > diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h > index 5e934da..f200bc8 100644 > --- a/arch/arm/include/asm/arch-ls102xa/config.h > +++ b/arch/arm/include/asm/arch-ls102xa/config.h > @@ -36,6 +36,7 @@ > #define CONFIG_SYS_LS102XA_USB1_ADDR \ > (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) > > +#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 > #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 > #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 > #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > index 697d4ca..a73ef2e 100644 > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > @@ -37,6 +37,43 @@ > > #define DCFG_DCSR_PORCR1 0 > > +/* > + * Define default values for some CCSR macros to make header files cleaner* You have a trailing * here > + * > + * To completely disable CCSR relocation in a board header file, define > + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS > + * to a value that is the same as CONFIG_SYS_CCSRBAR. > + */ > + > +#ifdef CONFIG_SYS_CCSRBAR_PHYS > +#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly." > +#endif > + > +#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE > +#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH > +#undef CONFIG_SYS_CCSRBAR_PHYS_LOW > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 > +#endif > + > +#ifndef CONFIG_SYS_CCSRBAR > +#define CONFIG_SYS_CCSRBAR CONFIG_SYS_IMMR > +#endif > + > +#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH > +#ifdef CONFIG_PHYS_64BIT > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf > +#else > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 > +#endif > +#endif > + > +#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW > +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR > +#endif > + > +#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ > + CONFIG_SYS_CCSRBAR_PHYS_LOW) > + Changing CCSR macros should be in a separated patch. York
York, > On 01/08/2015 09:13 PM, Alison Wang wrote: > > There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id for > > using the same SMMU3 on LS1021A. > > > > Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> > > Signed-off-by: Alison Wang <alison.wang@freescale.com> > > --- > > arch/arm/include/asm/arch-ls102xa/config.h | 1 + > > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 37 > ++++++++++++++ > > .../include/asm/arch-ls102xa/ls102xa_stream_id.h | 57 > ++++++++++++++++++++++ > > board/freescale/common/ls102xa_stream_id.c | 15 ++++++ > > board/freescale/ls1021aqds/ls1021aqds.c | 21 ++++++++ > > board/freescale/ls1021atwr/ls1021atwr.c | 21 ++++++++ > > 6 files changed, 152 insertions(+) > > > > diff --git a/arch/arm/include/asm/arch-ls102xa/config.h > > b/arch/arm/include/asm/arch-ls102xa/config.h > > index 5e934da..f200bc8 100644 > > --- a/arch/arm/include/asm/arch-ls102xa/config.h > > +++ b/arch/arm/include/asm/arch-ls102xa/config.h > > @@ -36,6 +36,7 @@ > > #define CONFIG_SYS_LS102XA_USB1_ADDR \ > > (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) > > > > +#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 > > #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 > > #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 > > #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > index 697d4ca..a73ef2e 100644 > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > @@ -37,6 +37,43 @@ > > > > #define DCFG_DCSR_PORCR1 0 > > > > +/* > > + * Define default values for some CCSR macros to make header files > > +cleaner* > > You have a trailing * here [Alison Wang] I will remove it in v2. > > > + * > > + * To completely disable CCSR relocation in a board header file, > > + define > > + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force > > + CONFIG_SYS_CCSRBAR_PHYS > > + * to a value that is the same as CONFIG_SYS_CCSRBAR. > > + */ > > + > > +#ifdef CONFIG_SYS_CCSRBAR_PHYS > > +#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly." > > +#endif > > + > > +#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE #undef > > +CONFIG_SYS_CCSRBAR_PHYS_HIGH #undef CONFIG_SYS_CCSRBAR_PHYS_LOW > > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 > > +#endif > > + > > +#ifndef CONFIG_SYS_CCSRBAR > > +#define CONFIG_SYS_CCSRBAR CONFIG_SYS_IMMR > > +#endif > > + > > +#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH > > +#ifdef CONFIG_PHYS_64BIT > > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf > > +#else > > +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 > > +#endif > > +#endif > > + > > +#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW > > +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR > > +#endif > > + > > +#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * > 1ull) << 32 | \ > > + CONFIG_SYS_CCSRBAR_PHYS_LOW) > > + > > > Changing CCSR macros should be in a separated patch. [Alison Wang] Ok. Thanks. Best Regards, Alison Wang
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 5e934da..f200bc8 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -36,6 +36,7 @@ #define CONFIG_SYS_LS102XA_USB1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) +#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 697d4ca..a73ef2e 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -37,6 +37,43 @@ #define DCFG_DCSR_PORCR1 0 +/* + * Define default values for some CCSR macros to make header files cleaner* + * + * To completely disable CCSR relocation in a board header file, define + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS + * to a value that is the same as CONFIG_SYS_CCSRBAR. + */ + +#ifdef CONFIG_SYS_CCSRBAR_PHYS +#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly." +#endif + +#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#undef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#endif + +#ifndef CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR CONFIG_SYS_IMMR +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf +#else +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#endif +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR +#endif + +#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ + CONFIG_SYS_CCSRBAR_PHYS_LOW) + struct sys_info { unsigned long freq_processor[CONFIG_MAX_CPUS]; unsigned long freq_systembus; diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h index abd70fc..fa571b3 100644 --- a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h +++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h @@ -7,11 +7,68 @@ #ifndef __FSL_LS102XA_STREAM_ID_H_ #define __FSL_LS102XA_STREAM_ID_H_ +#include <fsl_sec.h> + +#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \ + { .compat = name, \ + .id = { idA }, .num_ids = 1, \ + .reg_offset = off + CONFIG_SYS_IMMR, \ + .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ + } + +#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \ + { .compat = name, \ + .id = { idA, idB }, .num_ids = 2, \ + .reg_offset = off + CONFIG_SYS_IMMR, \ + .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ + } + +/* + * handle both old and new versioned SEC properties: + * "fsl,secX.Y" became "fsl,sec-vX.Y" during development + */ +#define SET_SEC_JR_LIODN_ENTRY(jrnum, liodnA, liodnB) \ + SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB, \ + offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum), \ + SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\ + offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum) + +/* This is a bit evil since we treat rtic param as both a string & hex value */ +#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \ + SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \ + liodnA, \ + offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \ + SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \ + liodnA, \ + offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)) + +#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \ + SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \ + offsetof(ccsr_sec_t, decoliodnr[num].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, 0) + +struct liodn_id_table { + const char *compat; + u32 id[2]; + u8 num_ids; + phys_addr_t compat_offset; + unsigned long reg_offset; +}; + struct smmu_stream_id { uint16_t offset; uint16_t stream_id; char dev_name[32]; }; +void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size); void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num); #endif diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c index 6154c9c..f434269 100644 --- a/board/freescale/common/ls102xa_stream_id.c +++ b/board/freescale/common/ls102xa_stream_id.c @@ -16,3 +16,18 @@ void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num) for (i = 0; i < num; i++) out_be32(scfg + id[i].offset, id[i].stream_id); } + +void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size) +{ + int i; + u32 liodn; + + for (i = 0; i < size; i++) { + if (tbl[i].num_ids == 2) + liodn = (tbl[i].id[0] << 16) | tbl[i].id[1]; + else + liodn = tbl[i].id[0]; + + out_le32((uint32_t *)(tbl[i].reg_offset), liodn); + } +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index f08e54f..a578ba7 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -450,6 +450,25 @@ static struct csu_ns_dev ns_dev[] = { }; #endif +struct liodn_id_table sec_liodn_tbl[] = { + SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(a, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(b, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(c, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(d, 0x10), + SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10), +}; + struct smmu_stream_id dev_stream_id[] = { { 0x100, 0x01, "ETSEC MAC1" }, { 0x104, 0x02, "ETSEC MAC2" }, @@ -489,6 +508,8 @@ int board_init(void) config_serdes_mux(); #endif + ls1021x_config_caam_stream_id(sec_liodn_tbl, + ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 8ab229d..8b73172 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -389,6 +389,25 @@ static struct csu_ns_dev ns_dev[] = { }; #endif +struct liodn_id_table sec_liodn_tbl[] = { + SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(a, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(b, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(c, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(d, 0x10), + SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10), +}; + struct smmu_stream_id dev_stream_id[] = { { 0x100, 0x01, "ETSEC MAC1" }, { 0x104, 0x02, "ETSEC MAC2" }, @@ -425,6 +444,8 @@ int board_init(void) #endif #endif + ls1021x_config_caam_stream_id(sec_liodn_tbl, + ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id));