From patchwork Thu Jan 8 13:00:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 426621 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 44D1C1400D5 for ; Fri, 9 Jan 2015 00:01:25 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 816D94B612; Thu, 8 Jan 2015 14:01:19 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nwnwlH9PWFaO; Thu, 8 Jan 2015 14:01:19 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 488554B61F; Thu, 8 Jan 2015 14:01:16 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D4D984B5FA for ; Thu, 8 Jan 2015 14:01:11 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id a6Gfq9CK14SN for ; Thu, 8 Jan 2015 14:01:11 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2on0138.outbound.protection.outlook.com [207.46.100.138]) by theia.denx.de (Postfix) with ESMTPS id 19EB44B5EB for ; Thu, 8 Jan 2015 14:01:07 +0100 (CET) Received: from BY2PR03CA049.namprd03.prod.outlook.com (10.141.249.22) by BLUPR03MB247.namprd03.prod.outlook.com (10.255.213.21) with Microsoft SMTP Server (TLS) id 15.1.53.17; Thu, 8 Jan 2015 13:01:03 +0000 Received: from BL2FFO11FD049.protection.gbl (2a01:111:f400:7c09::129) by BY2PR03CA049.outlook.office365.com (2a01:111:e400:2c5d::22) with Microsoft SMTP Server (TLS) id 15.1.53.17 via Frontend Transport; Thu, 8 Jan 2015 13:01:02 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD049.mail.protection.outlook.com (10.173.161.211) with Microsoft SMTP Server (TLS) id 15.1.49.13 via Frontend Transport; Thu, 8 Jan 2015 13:01:02 +0000 Received: from linux-jyl1.ap.freescale.net (b51431-11.ap.freescale.net [10.193.102.40]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t08D0hAb031698; Thu, 8 Jan 2015 06:00:59 -0700 From: Peng Fan To: , Date: Thu, 8 Jan 2015 21:00:36 +0800 Message-ID: <1420722038-22884-2-git-send-email-Peng.Fan@freescale.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1420722038-22884-1-git-send-email-Peng.Fan@freescale.com> References: <1420722038-22884-1-git-send-email-Peng.Fan@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Peng.Fan@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(199003)(189002)(21056001)(19580405001)(6806004)(120916001)(85426001)(89996001)(106466001)(105606002)(19580395003)(87936001)(76176999)(50986999)(99396003)(97736003)(84676001)(50226001)(229853001)(107046002)(4396001)(64706001)(47776003)(104016003)(46102003)(20776003)(86362001)(92566001)(62966003)(31966008)(2950100001)(77156002)(50466002)(48376002)(68736005)(36756003)(77096005); DIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB247; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-DmarcAction: None X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(3005003);SRVR:BLUPR03MB247; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:BLUPR03MB247; X-Forefront-PRVS: 0450A714CB X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB247; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2015 13:01:02.5442 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB247 Cc: fabio.estevam@freescale.com, B37916@freescale.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/3] pmic:pfuz100 add switch mode and more registers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add more pfuze register offset. And switch mode definition. Signed-off-by: Peng Fan --- include/power/pfuze100_pmic.h | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 1118489..7474afb 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -16,14 +16,34 @@ enum { PFUZE100_SW1ABVOL = 0x20, PFUZE100_SW1ABSTBY = 0x21, + PFUZE100_SW1ABOFF = 0x22, + PFUZE100_SW1ABMODE = 0x23, PUZE_100_SW1ABCONF = 0x24, PFUZE100_SW1CVOL = 0x2e, PFUZE100_SW1CSTBY = 0x2f, + PFUZE100_SW1COFF = 0x30, + PFUZE100_SW1CMODE = 0x31, PFUZE100_SW1CCONF = 0x32, PFUZE100_SW2VOL = 0x35, + PFUZE100_SW2STBY = 0x36, + PFUZE100_SW2OFF = 0x37, + PFUZE100_SW2MODE = 0x38, + PFUZE100_SW2CONF = 0x39, PFUZE100_SW3AVOL = 0x3c, + PFUZE100_SW3ASTBY = 0x3D, + PFUZE100_SW3AOFF = 0x3E, + PFUZE100_SW3AMODE = 0x3F, + PFUZE100_SW3ACONF = 0x40, PFUZE100_SW3BVOL = 0x43, + PFUZE100_SW3BSTBY = 0x44, + PFUZE100_SW3BOFF = 0x45, + PFUZE100_SW3BMODE = 0x46, + PFUZE100_SW3BCONF = 0x47, PFUZE100_SW4VOL = 0x4a, + PFUZE100_SW4STBY = 0x4b, + PFUZE100_SW4OFF = 0x4c, + PFUZE100_SW4MODE = 0x4d, + PFUZE100_SW4CONF = 0x4e, PFUZE100_SWBSTCON1 = 0x66, PFUZE100_VREFDDRCON = 0x6a, PFUZE100_VSNVSVOL = 0x6b, @@ -177,5 +197,38 @@ enum { #define SWBST_MODE_AUTO (2 << 2) #define SWBST_MODE_APS (2 << 3) +/* + * Regulator Mode Control + * + * OFF: The regulator is switched off and the output voltage is discharged. + * PFM: In this mode, the regulator is always in PFM mode, which is useful + * at light loads for optimized efficiency. + * PWM: In this mode, the regulator is always in PWM mode operation + * regardless of load conditions. + * APS: In this mode, the regulator moves automatically between pulse + * skipping mode and PWM mode depending on load conditions. + * + * SWxMODE[3:0] + * Normal Mode | Standby Mode | value + * OFF OFF 0x0 + * PWM OFF 0x1 + * PFM OFF 0x3 + * APS OFF 0x4 + * PWM PWM 0x5 + * PWM APS 0x6 + * APS APS 0x8 + * APS PFM 0xc + * PWM PFM 0xd + */ +#define OFF_OFF 0x0 +#define PWM_OFF 0x1 +#define PFM_OFF 0x3 +#define APS_OFF 0x4 +#define PWM_PWM 0x5 +#define PWM_APS 0x6 +#define APS_APS 0x8 +#define APS_PFM 0xc +#define PWM_PFM 0xd + int power_pfuze100_init(unsigned char bus); #endif