From patchwork Wed Dec 10 12:51:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 419635 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B8D971400A0 for ; Wed, 10 Dec 2014 23:52:23 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A82704B7C7; Wed, 10 Dec 2014 13:52:11 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1WhdDNIGJb7J; Wed, 10 Dec 2014 13:52:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 183C64B7C5; Wed, 10 Dec 2014 13:52:11 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 15F3F4B7FB for ; Wed, 10 Dec 2014 13:52:09 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8tF2LTHctqWn for ; Wed, 10 Dec 2014 13:52:09 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by theia.denx.de (Postfix) with ESMTPS id C0B954B7DA for ; Wed, 10 Dec 2014 13:52:03 +0100 (CET) Received: by mail-pd0-f176.google.com with SMTP id r10so750316pdi.35 for ; Wed, 10 Dec 2014 04:52:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=I+X/OF6/3ksYCaFmX14zX+GCuG+MnN10U8gvtWQanzQ=; b=SAb7YFNH2q+9ICWnJQN23OCvZUFeQPpSxj7NfX39GXUcP30FdKfVSTZfwpENNVjjYV 8Sgd7bn8NCwZJBfy2a7TVM4aO8g1oNX5AQfRtB7sej4hulCjcHgzs6zv0W9sz3V3s6xq MWZ2gL7btx0F2An3439fjVXQQaPGCHd+kPBr8A4TQeBrjsy4OUSJlcbWrhw9pAmQVcKc eEWpSjsiEx9o5DgOHdBj3Wp5rSTWbxSyeEAD4QsG9usO21J2xPmhxrx+TeRo+79yrCZq 4i+uhMP2/HAVFApiUSt0nxDUhuhMtUhQIBdnrAy8M0ookgYlWHUFWncDDrN9L4d8jWj1 QjQg== X-Received: by 10.70.89.68 with SMTP id bm4mr6716323pdb.15.1418215922084; Wed, 10 Dec 2014 04:52:02 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id ph6sm4189708pbc.43.2014.12.10.04.52.00 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 10 Dec 2014 04:52:01 -0800 (PST) From: Bin Meng To: Jagannadha Sutradharudu Teki , U-Boot Mailing List Date: Wed, 10 Dec 2014 20:51:26 +0800 Message-Id: <1418215892-17617-4-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1418215892-17617-1-git-send-email-bmeng.cn@gmail.com> References: <1418215892-17617-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v3 3/9] sf: Update EON flash params X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Update supported read commands for EON flash parts to RD_EXTN and QUAD_IO_FAST per datasheet. Also update flash sector size to 4KiB as long as flash supports sector erase (20h) command. Signed-off-by: Bin Meng --- drivers/mtd/spi/sf_params.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index cc4cd60..3e5c6e0 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -26,10 +26,10 @@ const struct spi_flash_params spi_flash_params_table[] = { {"AT25DF321A", 0x1f4701, 0x0, 4 * 1024, 1024, RD_NORM, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, RD_NORM, 0}, - {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, RD_NORM, 0}, + {"EN25Q32B", 0x1c3016, 0x0, 4 * 1024, 1024, RD_EXTN | QUAD_IO_FAST, SECT_4K}, + {"EN25Q64", 0x1c3017, 0x0, 4 * 1024, 2048, RD_EXTN | QUAD_IO_FAST, SECT_4K}, + {"EN25Q128B", 0x1c3018, 0x0, 4 * 1024, 4096, RD_EXTN | QUAD_IO_FAST, SECT_4K}, + {"EN25S64", 0x1c3817, 0x0, 4 * 1024, 2048, RD_EXTN | QUAD_IO_FAST, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},