From patchwork Thu Nov 20 08:11:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 412580 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C550514010B for ; Thu, 20 Nov 2014 19:11:39 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 827864B62B; Thu, 20 Nov 2014 09:11:33 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id t8Aj+BCVBQbY; Thu, 20 Nov 2014 09:11:33 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 97B034B614; Thu, 20 Nov 2014 09:11:32 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6F2B44B614 for ; Thu, 20 Nov 2014 09:11:30 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Zo4njyjcgtpU for ; Thu, 20 Nov 2014 09:11:30 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f48.google.com (mail-pa0-f48.google.com [209.85.220.48]) by theia.denx.de (Postfix) with ESMTPS id 0890B4B610 for ; Thu, 20 Nov 2014 09:11:24 +0100 (CET) Received: by mail-pa0-f48.google.com with SMTP id rd3so2080325pab.21 for ; Thu, 20 Nov 2014 00:11:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id; bh=xyhI1ISKjbnqU6hSSX0obAfjsDig2C6+GgIIV9swv00=; b=l9NaqB+i4WeT+cuXHXuRN3le+8en7iKS/FFV/2sIyKA/i1yZVg1LszKLzJu8U/+NSA /a7Ke7ZebP60fCtTUoTSF86Umpl9NZ6s0FIfHSk/0PjXwajreypjvNs3UKo70y7QPksg o/hlnmujs4oqICXElOASSV+ZZJvSABuEYRbobVNeDTIHmClgWNXDwv2ptIu9OZ4GTzS9 0LNxs/LWnjMTfl6q+3m+XcxevUgQAyF6VFghufrC/6YgfZ6Vmb2LLNS6MkI/S601yVaD ICmncHeWUeHxzmeAG0vay95GT6drtlM4A1JCk2VgNpASv30rPL0NDFVEZQm0EaTjTpfD HS/Q== X-Received: by 10.70.38.198 with SMTP id i6mr54009313pdk.93.1416471082878; Thu, 20 Nov 2014 00:11:22 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id p10sm1284167pds.63.2014.11.20.00.11.20 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 20 Nov 2014 00:11:22 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Thu, 20 Nov 2014 16:11:16 +0800 Message-Id: <1416471076-16182-1-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 Subject: [U-Boot] [PATCH 3/4] x86: Refactor interrupt_init() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to i8259_init() and create a new interrupt_init() in arch/x86/cpu/interrupt.c to call i8259_init() followed by a call to cpu_init_interrupts(). Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass --- arch/x86/cpu/interrupts.c | 26 ++++++++++++++++++++------ arch/x86/include/asm/i8259.h | 2 ++ arch/x86/lib/pcat_interrupts.c | 9 +-------- 3 files changed, 23 insertions(+), 14 deletions(-) diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c index 51e2c59..ea03724 100644 --- a/arch/x86/cpu/interrupts.c +++ b/arch/x86/cpu/interrupts.c @@ -20,6 +20,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -128,9 +129,6 @@ int cpu_init_interrupts(void) int irq_entry_size = irq_1 - irq_0; void *irq_entry = (void *)irq_0; - /* Just in case... */ - disable_interrupts(); - /* Setup the IDT */ for (i = 0; i < 256; i++) { idt[i].access = 0x8e; @@ -146,9 +144,6 @@ int cpu_init_interrupts(void) load_idt(&idt_ptr); - /* It is now safe to enable interrupts */ - enable_interrupts(); - return 0; } @@ -172,6 +167,25 @@ int disable_interrupts(void) return flags & X86_EFLAGS_IF; } +int interrupt_init(void) +{ + /* Just in case... */ + disable_interrupts(); + +#ifdef CONFIG_SYS_PCAT_INTERRUPTS + /* Initialize the master/slave i8259 pic */ + i8259_init(); +#endif + + /* Initialize core interrupt and exception functionality of CPU */ + cpu_init_interrupts(); + + /* It is now safe to enable interrupts */ + enable_interrupts(); + + return 0; +} + /* IRQ Low-Level Service Routine */ void irq_llsr(struct irq_regs *regs) { diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index 73113f9..bc4033b 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h @@ -69,4 +69,6 @@ #define ICW4_AEOI 0x02 /* Automatic EOI Mode */ #define ICW4_PM 0x01 /* Microprocessor Mode */ +int i8259_init(void); + #endif diff --git a/arch/x86/lib/pcat_interrupts.c b/arch/x86/lib/pcat_interrupts.c index 2ce371e..27c7f08 100644 --- a/arch/x86/lib/pcat_interrupts.c +++ b/arch/x86/lib/pcat_interrupts.c @@ -24,12 +24,10 @@ #error "CONFIG_SYS_NUM_IRQS must equal 16 if CONFIG_SYS_NUM_IRQS is defined" #endif -int interrupt_init(void) +int i8259_init(void) { u8 i; - disable_interrupts(); - /* Mask all interrupts */ outb(0xff, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); @@ -62,11 +60,6 @@ int interrupt_init(void) */ unmask_irq(2); - /* Initialize core interrupt and exception functionality of CPU */ - cpu_init_interrupts(); - - enable_interrupts(); - return 0; }