From patchwork Tue Nov 11 01:00:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 409134 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B33F614011B for ; Tue, 11 Nov 2014 12:02:34 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 18A804B7D5; Tue, 11 Nov 2014 02:02:17 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cMpTMRI2uxrV; Tue, 11 Nov 2014 02:02:16 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AEB434B72A; Tue, 11 Nov 2014 02:01:47 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E994C4B6F5 for ; Tue, 11 Nov 2014 02:01:20 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id U-i33DUNa6Os for ; Tue, 11 Nov 2014 02:01:20 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f73.google.com (mail-pa0-f73.google.com [209.85.220.73]) by theia.denx.de (Postfix) with ESMTPS id 2D13C4B70A for ; Tue, 11 Nov 2014 02:01:17 +0100 (CET) Received: by mail-pa0-f73.google.com with SMTP id lj1so1444462pab.0 for ; Mon, 10 Nov 2014 17:01:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DTXqh0zeQIe2IjB4P0ZCKAOwSfCPrXb9eGjqs4VvYyg=; b=CBYlDISlv6nu5cse6fmHAHCQCWq0jryRS3BGENC4PAh4mmk5ZiB5DZ1tAK/vu+6zSf GFnvDq8UfVvvFuV0RFyrkGDCoW+QjgWNX5Y44VQKlWFcUOXjpNUgVyrvbsTN1KqFChOd HLmzfZIAswI4l2Rl81mHylH7DwjW4NXQ28MMDLoJbcFdj7tJ9wH+lR51IMgqQckSrJzr HmbUBAedB62gWGoUyzFW2yM+5zgnZG2vTvEcRyPnWWif3xqRVqgbI+E8DgUuAgrbbQLx i2dM+dO73NeL9261E6AYugQ69hbYtNGN11FHNpbDxVRI6T4cRAYfd/E8zBCIF9XQo8it Txng== X-Gm-Message-State: ALoCoQmGVnb6iVqHM7XSvD4ZOq/64m/zPKydpRlLwvH4K1ZGdjA2q/975Bwyqrr9fol5kknVQbnE X-Received: by 10.66.183.164 with SMTP id en4mr27909888pac.19.1415667676409; Mon, 10 Nov 2014 17:01:16 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id t24si127697yht.2.2014.11.10.17.01.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Nov 2014 17:01:16 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id yHD6V0y0.3; Mon, 10 Nov 2014 17:01:16 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 78102221207; Mon, 10 Nov 2014 18:01:15 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Mon, 10 Nov 2014 18:00:39 -0700 Message-Id: <1415667650-14899-23-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1415667650-14899-1-git-send-email-sjg@chromium.org> References: <1415667650-14899-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ Subject: [U-Boot] [PATCH v2 22/33] x86: Add msr read/write functions that use a structure X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de It is convenient to be able to adjust MSRs with a structure that splits the two 32-bit halves into separate fields, as they are often dealt with separately. Add a few functions to support this. Signed-off-by: Simon Glass --- Changes in v2: None arch/x86/include/asm/msr.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 3b5915d..df43983 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -175,6 +175,25 @@ static inline int wrmsr_safe_regs(u32 regs[8]) return native_wrmsr_safe_regs(regs); } +typedef struct msr_t { + uint32_t lo; + uint32_t hi; +} msr_t; + +static inline struct msr_t msr_read(unsigned msr_num) +{ + struct msr_t msr; + + rdmsr(msr_num, msr.lo, msr.hi); + + return msr; +} + +static inline void msr_write(unsigned msr_num, msr_t msr) +{ + wrmsr(msr_num, msr.lo, msr.hi); +} + #define rdtscl(low) \ ((low) = (u32)__native_read_tsc())