From patchwork Tue Nov 11 01:00:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 409137 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 99BED14011B for ; Tue, 11 Nov 2014 12:02:57 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B45C94B748; Tue, 11 Nov 2014 02:02:39 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4lt25SFFm9Su; Tue, 11 Nov 2014 02:02:39 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 930BD4B7A5; Tue, 11 Nov 2014 02:01:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4515D4B72A for ; Tue, 11 Nov 2014 02:01:21 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id b-bBFYyZmWvD for ; Tue, 11 Nov 2014 02:01:21 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f73.google.com (mail-pa0-f73.google.com [209.85.220.73]) by theia.denx.de (Postfix) with ESMTPS id 2D3144B712 for ; Tue, 11 Nov 2014 02:01:17 +0100 (CET) Received: by mail-pa0-f73.google.com with SMTP id lj1so1442626pab.4 for ; Mon, 10 Nov 2014 17:01:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8Mgi9NXgf9R39r4D+m9T80xoYbjaUuzHO80fsvDPQxE=; b=WT3oZC4HOTHdLg6FmF0Pzqykrs1mP2rh4cf8wpp0NSuO/3uxEfydwrjapIFyXx7dx0 p2y2dkKAdBHPjZMDMUq6BqPvWsTM73z0vBIzPItX7AiaWUvTZyKOQ8RYIk+bhlmBlkip ph4brLnn4FtrxOEeN5TQ45G5sAGy8OdYOwOYAxJ7d3YBuUiM4v8LXtBH33unDlVKWzBV gdEPtO2xxtss2MATkBzEFMxf0HyCWmCQOOgFCC0xMMUpVH32mmlMgbIfFvM88CYbqWIG yFXoPqwQI5JmD78Vfi241evROVDA42PVADUpwgppScZQDAwHwz5hXSqku1Lg0NDtS1NH 0g9A== X-Gm-Message-State: ALoCoQm162+9A2iBMDMRk6igE2jY6XWZNW3ne0BQwWxULxdQe4ANITdsYC8rm2eGeMxEytYDuulF X-Received: by 10.70.63.41 with SMTP id d9mr27808648pds.5.1415667676307; Mon, 10 Nov 2014 17:01:16 -0800 (PST) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id r6si715307yhg.1.2014.11.10.17.01.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Nov 2014 17:01:16 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id QIf9cFaS.3; Mon, 10 Nov 2014 17:01:16 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 5F898221204; Mon, 10 Nov 2014 18:01:15 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Mon, 10 Nov 2014 18:00:38 -0700 Message-Id: <1415667650-14899-22-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1415667650-14899-1-git-send-email-sjg@chromium.org> References: <1415667650-14899-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ Subject: [U-Boot] [PATCH v2 21/33] x86: Add clr/setbits functions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de These are available on other architectures. Make them available on x86 also. Signed-off-by: Simon Glass --- Changes in v2: None arch/x86/include/asm/io.h | 49 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 86bac90..fcd9aa9 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -69,6 +69,55 @@ #define memcpy_fromio(a,b,c) memcpy((a),(b),(c)) #define memcpy_toio(a,b,c) memcpy((a),(b),(c)) +#define write_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) +#define read_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) + +#define write_le64(a, v) write_arch(q, le64, a, v) +#define write_le32(a, v) write_arch(l, le32, a, v) +#define write_le16(a, v) write_arch(w, le16, a, v) + +#define read_le64(a) read_arch(q, le64, a) +#define read_le32(a) read_arch(l, le32, a) +#define read_le16(a) read_arch(w, le16, a) + +#define write_be32(a, v) write_arch(l, be32, a, v) +#define write_be16(a, v) write_arch(w, be16, a, v) + +#define read_be32(a) read_arch(l, be32, a) +#define read_be16(a) read_arch(w, be16, a) + +#define write_8(a, v) __raw_writeb(v, a) +#define read_8(a) __raw_readb(a) + +#define clrbits(type, addr, clear) \ + write_##type((addr), read_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + write_##type((addr), read_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + write_##type((addr), (read_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + /* * ISA space is 'always mapped' on a typical x86 system, no need to * explicitly ioremap() it. The fact that the ISA IO space is mapped