From patchwork Tue Nov 11 00:16:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 409111 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 097E3140142 for ; Tue, 11 Nov 2014 11:17:57 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 237874B6D1; Tue, 11 Nov 2014 01:17:53 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id e5xlwSF8rIKp; Tue, 11 Nov 2014 01:17:52 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 900C34B6B2; Tue, 11 Nov 2014 01:17:49 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C0A464B6B0 for ; Tue, 11 Nov 2014 01:17:43 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AS3hPuJppleQ for ; Tue, 11 Nov 2014 01:17:43 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ig0-f201.google.com (mail-ig0-f201.google.com [209.85.213.201]) by theia.denx.de (Postfix) with ESMTPS id 606FE4B69C for ; Tue, 11 Nov 2014 01:17:40 +0100 (CET) Received: by mail-ig0-f201.google.com with SMTP id h15so15237igd.2 for ; Mon, 10 Nov 2014 16:17:39 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k7AOJRf05yBopQGtLndzrJfE1W0omdfzwsxHUB5+Z1s=; b=c3OPQG5grVdcfpH9VQ8A0QQf2QAAjiPpkrcMz1iBEqvzmDEtYQ1m5Nx/cPvISkxkK2 iUx0jk8voxJV3svCULnW2gavM2GeZaBwrHEn+ArMedeoH+0Ny16izAWofcYHo+TeuJ6+ oi01nqltamWi6I4vCFrLhH2rDufzxBSP8gxBpv2mJFQVsecjS0e4+85yonLd1uTqjfQe b9ILP6tmx/cxoadEe+hg/iJxS3kgpuomzN6xTYbDS2LEWCc+W0V8Li1IVXlVXr40M0xq mOVHBD5z5VVufPmQcLurU03bjYXiZ/hLW5xLymJLE9Ok13OTdPIh4DYwO9Jy6Wv+/EOU Z+kQ== X-Gm-Message-State: ALoCoQk6dBuOaYwhia3rNj29QEXa3rTVkCo4Cos/ww8fx5rngNZB33KwywElctlNDkgI4U2UluiY X-Received: by 10.182.245.162 with SMTP id xp2mr24417764obc.8.1415665059090; Mon, 10 Nov 2014 16:17:39 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id k66si741513yho.7.2014.11.10.16.17.38 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Nov 2014 16:17:39 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id Xif6Pv5n.1; Mon, 10 Nov 2014 16:17:39 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 962BC221172; Mon, 10 Nov 2014 17:17:37 -0700 (MST) From: Simon Glass To: u-boot@lists.denx.de Date: Mon, 10 Nov 2014 17:16:50 -0700 Message-Id: <1415665015-12651-11-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1415665015-12651-1-git-send-email-sjg@chromium.org> References: <1415665015-12651-1-git-send-email-sjg@chromium.org> Cc: Stephen Warren , Tom Warren Subject: [U-Boot] [PATCH v3 10/14] dm: tegra: Add platform data for the SPL uart X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Since we currently don't have device tree available in SPL, add platform data so the uart works. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/serial/serial_tegra.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/serial/serial_tegra.c b/drivers/serial/serial_tegra.c index 7eb70e1..b9227f0 100644 --- a/drivers/serial/serial_tegra.c +++ b/drivers/serial/serial_tegra.c @@ -9,6 +9,7 @@ #include #include +#ifdef CONFIG_OF_CONTROL static const struct udevice_id tegra_serial_ids[] = { { .compatible = "nvidia,tegra20-uart" }, { } @@ -26,13 +27,28 @@ static int tegra_serial_ofdata_to_platdata(struct udevice *dev) return 0; } +#else +struct ns16550_platdata tegra_serial = { + .base = CONFIG_SYS_NS16550_COM1, + .reg_shift = 2, + .clock = V_NS16550_CLK, +}; + +U_BOOT_DEVICE(ns16550_serial) = { + "serial_tegra20", &tegra_serial +}; +#endif + U_BOOT_DRIVER(serial_ns16550) = { .name = "serial_tegra20", .id = UCLASS_SERIAL, +#ifdef CONFIG_OF_CONTROL .of_match = tegra_serial_ids, .ofdata_to_platdata = tegra_serial_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), +#endif .priv_auto_alloc_size = sizeof(struct NS16550), .probe = ns16550_serial_probe, .ops = &ns16550_serial_ops, + .flags = DM_FLAG_PRE_RELOC, };