From patchwork Fri Nov 7 11:37:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 408074 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 11C771400A6 for ; Fri, 7 Nov 2014 22:38:19 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2D7C4BB90; Fri, 7 Nov 2014 12:38:13 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fjzDORFYp7bd; Fri, 7 Nov 2014 12:38:13 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 739534BB91; Fri, 7 Nov 2014 12:38:09 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 271EC4BB53 for ; Fri, 7 Nov 2014 12:38:03 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yW+PxTle2K5b for ; Fri, 7 Nov 2014 12:38:03 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo4-p05-ob.smtp.rzone.de (mo4-p05-ob.smtp.rzone.de [81.169.146.183]) by theia.denx.de (Postfix) with ESMTPS id 089454BB4F for ; Fri, 7 Nov 2014 12:37:59 +0100 (CET) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohfvxEndrDXKjzPMsB3oimjD61I4fPQhgcxW13 X-RZG-CLASS-ID: mo05 Received: from stefan-work.domain_not_set.invalid (b9168f14.cgn.dg-w.de [185.22.143.20]) by post.strato.de (RZmta 35.10 AUTH) with ESMTPA id z06de4qA7BbrVWj; Fri, 7 Nov 2014 12:37:53 +0100 (CET) From: Stefan Roese To: u-boot@lists.denx.de Date: Fri, 7 Nov 2014 12:37:52 +0100 Message-Id: <1415360272-13249-5-git-send-email-sr@denx.de> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1415360272-13249-1-git-send-email-sr@denx.de> References: <1415360272-13249-1-git-send-email-sr@denx.de> Cc: Marek Vasut , Vince Bridgers , Pavel Machek , Chin Liang See , Dinh Nguyen Subject: [U-Boot] [PATCH 4/4 v4] arm: socfpga: Add Cadence QSPI support to config header X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de With this driver enabled for SoCFPGA, access to SPI NOR flash is supported. The configuration (page size, timing info) will be taken from the DT. See socrates as an example. This QSPI supports depends on DT. So QSPI is only enabled if CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig). Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek Cc: Simon Glass Cc: Jagannadha Sutradharudu Teki --- v4: - Some config parameters (page-size and timing are now removed and will be read from the DT instead) include/configs/socfpga_common.h | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f7b314d..9fc4212 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -141,7 +141,7 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */ #endif - /* +/* * I2C support */ #define CONFIG_SYS_I2C @@ -169,6 +169,29 @@ unsigned int cm_get_l4_sp_clk_hz(void); #define CONFIG_CMD_I2C /* + * QSPI support + */ +#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ +#define CONFIG_CMD_DM +#define CONFIG_DM +#define CONFIG_DM_SPI +#define CONFIG_DM_SPI_FLASH +#define CONFIG_CADENCE_QSPI +/* Enable multiple SPI NOR flash manufacturers */ +#define CONFIG_SPI_FLASH /* SPI flash subsystem */ +#define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ +#define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */ +#define CONFIG_SPI_FLASH_MTD +/* QSPI reference clock */ +#ifndef __ASSEMBLY__ +unsigned int cm_get_qspi_controller_clk_hz(void); +#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() +#endif +#define CONFIG_CQSPI_DECODER 0 +#define CONFIG_CMD_SF +#endif + +/* * Serial Driver */ #define CONFIG_SYS_NS16550