From patchwork Wed Nov 5 05:25:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 406863 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5EDA51400A0 for ; Wed, 5 Nov 2014 16:25:47 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 195424BCA3; Wed, 5 Nov 2014 06:25:45 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jXlf7o5WoNQ2; Wed, 5 Nov 2014 06:25:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D17B4BC9E; Wed, 5 Nov 2014 06:25:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7A0B44BC9E for ; Wed, 5 Nov 2014 06:25:38 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uhnhtcm7SaHz for ; Wed, 5 Nov 2014 06:25:38 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp.mei.co.jp (smtp.mei.co.jp [133.183.100.20]) by theia.denx.de (Postfix) with ESMTP id B9D4E4BC9D for ; Wed, 5 Nov 2014 06:25:33 +0100 (CET) Received: from mail-gw.jp.panasonic.com ([157.8.1.157]) by smtp.mei.co.jp (8.12.11.20060614/3.7W/kc-maile14) with ESMTP id sA55PNwr017338; Wed, 5 Nov 2014 14:25:23 +0900 (JST) Received: from epochmail.jp.panasonic.com ([157.8.1.130]) by mail.jp.panasonic.com (8.11.6p2/3.7W/kc-maili13) with ESMTP id sA55POJ04561; Wed, 5 Nov 2014 14:25:24 +0900 Received: by epochmail.jp.panasonic.com (8.12.11.20060308/3.7W/lomi16) id sA55PO5L002944; Wed, 5 Nov 2014 14:25:24 +0900 Received: from poodle by lomi16.jp.panasonic.com (8.12.11.20060308/3.7W) with ESMTP id sA55PNk3002921; Wed, 5 Nov 2014 14:25:23 +0900 Received: from beagle.diag.org (beagle.diag.org [10.184.179.16]) by poodle (Postfix) with ESMTP id A5D8E2740043; Wed, 5 Nov 2014 14:25:23 +0900 (JST) From: Masahiro Yamada To: u-boot@lists.denx.de Date: Wed, 5 Nov 2014 14:25:15 +0900 Message-Id: <1415165115-10191-1-git-send-email-yamada.m@jp.panasonic.com> X-Mailer: git-send-email 1.9.1 Subject: [U-Boot] [PATCH] ARM: UniPhier: reset on-board devices on start-up X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de If a support card is attached to the main board, the on-board SMSC9118 LAN controller is available. It must be kept in reset state for a while on start-up. When the board is kicked via a debbuger rather than pushing the hardware reset button, on-board chips are not reset; in this case the reset signals should be asserted by software. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/uniphier/ph1-ld4/board_postclk_init.c | 2 ++ arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c | 2 ++ arch/arm/cpu/armv7/uniphier/reset.c | 3 --- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/board_postclk_init.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/board_postclk_init.c index 4302277..5bb8179 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/board_postclk_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/board_postclk_init.c @@ -24,6 +24,8 @@ int board_postclk_init(void) sg_init(); + uniphier_board_reset(); + pll_init(); uniphier_board_init(); diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c index 7198829..9a53743 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c @@ -21,6 +21,8 @@ int board_postclk_init(void) sg_init(); + uniphier_board_reset(); + pll_init(); uniphier_board_init(); diff --git a/arch/arm/cpu/armv7/uniphier/reset.c b/arch/arm/cpu/armv7/uniphier/reset.c index b0dc967..50d1fed 100644 --- a/arch/arm/cpu/armv7/uniphier/reset.c +++ b/arch/arm/cpu/armv7/uniphier/reset.c @@ -8,14 +8,11 @@ #include #include #include -#include void reset_cpu(unsigned long ignored) { u32 tmp; - uniphier_board_reset(); - writel(5, SC_IRQTIMSET); /* default value */ tmp = readl(SC_SLFRSTSEL);