From patchwork Tue Oct 14 05:42:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 399341 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C8C0E140140 for ; Tue, 14 Oct 2014 16:44:45 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 21152A760E; Tue, 14 Oct 2014 07:44:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TX1zx1rwO2Ft; Tue, 14 Oct 2014 07:44:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2B8ADA7623; Tue, 14 Oct 2014 07:43:45 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 34AF3A7429 for ; Tue, 14 Oct 2014 07:43:19 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F041oVVjvZWF for ; Tue, 14 Oct 2014 07:43:18 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ig0-f202.google.com (mail-ig0-f202.google.com [209.85.213.202]) by theia.denx.de (Postfix) with ESMTPS id 420AFA751E for ; Tue, 14 Oct 2014 07:43:15 +0200 (CEST) Received: by mail-ig0-f202.google.com with SMTP id r10so2114749igi.1 for ; Mon, 13 Oct 2014 22:43:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MXl2+xpi4edMZfrfEOj/RKJ2sccA2sc+JFyTSy9Q3Ns=; b=STwbSiANKxKQOmu1KlFI16BMhv16IB7KmKNc7eI6hPzTWAkZEhGF+1OcvGTHnwILTm /+KOOO7C65kbCPls4MnXretFQqHrwrs/7qCeYuUJ+HyHmo5Ugk6+L8kzfPLkyl8jEaal urNjrGSBhkiq6/5CTgPHDi09Ereub4ndVdNk2z0tvYvRtVlpirBlM15Gv/IJPh9MwiDT VPRuDfK0P5kifYpxX1tgavTMGrhsLkhGBpsc17EayHmA+UNWdE1L/euqfH2Wlw5Nj1NU 2seYuC0Q0HiZu6cL6XK1X68pgIOVOIUMovElqO1j/3ng7VLX4rV+XOtc8U641/HzH1Ce RdDw== X-Gm-Message-State: ALoCoQlxYPqfgW32o165ACkESbz8RPzsJO76UMRR2a5f20zKCmiEWGAPGO5W1zC50mW7qNhuZOFG X-Received: by 10.43.169.199 with SMTP id nn7mr2308160icc.30.1413265393805; Mon, 13 Oct 2014 22:43:13 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id t28si807973yhb.4.2014.10.13.22.43.13 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Oct 2014 22:43:13 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id 4jCPH2nB.2; Mon, 13 Oct 2014 22:43:13 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id D03E7221CFF; Mon, 13 Oct 2014 23:43:12 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 13 Oct 2014 23:42:03 -0600 Message-Id: <1413265336-9571-17-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1413265336-9571-1-git-send-email-sjg@chromium.org> References: <1413265336-9571-1-git-send-email-sjg@chromium.org> Cc: u-boot-review@google.com, Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH v4 16/29] exynos: universal_c210: Move to driver model soft_spi X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Adjust this board to use the driver model soft_spi implementation. Signed-off-by: Simon Glass Reviewed-by: Jagannadha Sutradharudu Teki --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/dts/exynos4210-universal_c210.dts | 13 ++++++++ board/samsung/universal_c210/universal.c | 52 ------------------------------ include/configs/s5pc210_universal.h | 11 +------ 3 files changed, 14 insertions(+), 62 deletions(-) diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts index cf3354f..9139810 100644 --- a/arch/arm/dts/exynos4210-universal_c210.dts +++ b/arch/arm/dts/exynos4210-universal_c210.dts @@ -41,6 +41,19 @@ status = "disabled"; }; + soft-spi { + compatible = "u-boot,soft-spi"; + cs-gpio = <&gpio 235 0>; /* Y43 */ + sclk-gpio = <&gpio 225 0>; /* Y31 */ + mosi-gpio = <&gpio 227 0>; /* Y33 */ + miso-gpio = <&gpio 224 0>; /* Y30 */ + spi-delay-us = <1>; + #address-cells = <1>; + #size-cells = <0>; + cs@0 { + }; + }; + fimd@11c00000 { compatible = "samsung,exynos-fimd"; reg = <0x11c00000 0xa4>; diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index c04f48c..22b0849 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -201,53 +201,6 @@ int exynos_early_init_f(void) return 0; } -#ifdef CONFIG_SOFT_SPI -static void soft_spi_init(void) -{ - gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK, - CONFIG_SOFT_SPI_MODE & SPI_CPOL); - gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1); - gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO); - gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS, - !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); -} - -void spi_cs_activate(struct spi_slave *slave) -{ - gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, - !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); - SPI_SCL(1); - gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, - CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, - !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && cs == 0; -} - -void universal_spi_scl(int bit) -{ - gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit); -} - -void universal_spi_sda(int bit) -{ - gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit); -} - -int universal_spi_read(void) -{ - return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO); -} -#endif - static void init_pmic_lcd(void) { unsigned char val; @@ -332,8 +285,6 @@ void exynos_cfg_lcd_gpio(void) /* gpio pad configuration for LCD reset. */ gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset"); gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT); - - spi_init(); } int mipi_power(void) @@ -401,9 +352,6 @@ int exynos_init(void) break; } -#ifdef CONFIG_SOFT_SPI - soft_spi_init(); -#endif check_hw_revision(); printf("HW Revision:\t0x%x\n", board_rev); diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 4fa8d66..4b30d14 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -187,16 +187,7 @@ * SPI Settings */ #define CONFIG_SOFT_SPI -#define CONFIG_SOFT_SPI_MODE SPI_MODE_3 -#define CONFIG_SOFT_SPI_GPIO_SCLK EXYNOS4_GPIO_Y31 -#define CONFIG_SOFT_SPI_GPIO_MOSI EXYNOS4_GPIO_Y33 -#define CONFIG_SOFT_SPI_GPIO_MISO EXYNOS4_GPIO_Y30 -#define CONFIG_SOFT_SPI_GPIO_CS EXYNOS4_GPIO_Y43 - -#define SPI_DELAY udelay(1) -#define SPI_SCL(bit) universal_spi_scl(bit) -#define SPI_SDA(bit) universal_spi_sda(bit) -#define SPI_READ universal_spi_read() + #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); void universal_spi_sda(int bit);