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[U-Boot,v5,02/15] exynos5: Enable data cache

Message ID 1412221423-10752-3-git-send-email-sjg@chromium.org
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Commit Message

Simon Glass Oct. 2, 2014, 3:43 a.m. UTC 
Things run faster when the data cache is enabled, so turn it on along with
the 'dcache' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix 'cashe' typo in commit subject

 include/configs/exynos5-dt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index a7c6292..8ee5268 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -37,8 +37,8 @@ 
 #define CONFIG_TRACE_EARLY_ADDR		0x50000000
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_CMD_CACHE
 
 /* Enable ACE acceleration for SHA1 and SHA256 */
 #define CONFIG_EXYNOS_ACE_SHA