From patchwork Thu Oct 2 03:43:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 395752 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1F11914017E for ; Thu, 2 Oct 2014 13:52:43 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9B49D4B604; Thu, 2 Oct 2014 05:52:34 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FUCH+ptbCYrl; Thu, 2 Oct 2014 05:52:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8DE44A73FE; Thu, 2 Oct 2014 05:52:29 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E17794B5FD for ; Thu, 2 Oct 2014 05:52:18 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jBGtPP0di+OA for ; Thu, 2 Oct 2014 05:52:18 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f201.google.com (mail-pd0-f201.google.com [209.85.192.201]) by theia.denx.de (Postfix) with ESMTPS id 3B99B4B600 for ; Thu, 2 Oct 2014 05:52:14 +0200 (CEST) Received: by mail-pd0-f201.google.com with SMTP id y10so317951pdj.2 for ; Wed, 01 Oct 2014 20:52:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qMBnTVMHdg49aLJkD30KtvR5KTbgmmBrDX0jbasGk5Q=; b=TteYKoWKV9iv4jtdva+j6TitLRhAmMS1HyLHjOSCb9PmRaCCQ1Q1U6GEyxtuDx2340 8e2KjGKA2Vgyt7dHnbdw1K5kSgRkDWTaJ3BizfY3RjTje54AKiXSghPCfQ0+d6ZGqnRI sT7nNnpgskRwCBs0kG7hsLb34SGrO0fZFpoWP76FmbkcuJCkfVqngVkHGex7DaAS5mmW 1fTGxPbsbmu9rpz6my9hc8NAVOZYTIx6LZB1tcUSbE67D820X/3BwGgKpUrSgUhTR/Wz t1FhEYvMI1hUp2T78q0o0EaC6IaPFitnWW3vX4hJ9DA8lu0V7JaVPYxErhvM9nagRWcJ muLQ== X-Gm-Message-State: ALoCoQmSUk3d3JQCFvf8GU+Rzq2sad2G7FLXSpUdqZIKcHKFGDn1P88q6QhrRCHs/HQ2GgQFWSA9 X-Received: by 10.66.249.231 with SMTP id yx7mr49878329pac.24.1412221933417; Wed, 01 Oct 2014 20:52:13 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id j25si120029yhb.0.2014.10.01.20.52.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Oct 2014 20:52:13 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id PLas9m5f.1; Wed, 01 Oct 2014 20:52:13 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id D2E05221551; Wed, 1 Oct 2014 21:44:41 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Wed, 1 Oct 2014 21:43:41 -0600 Message-Id: <1412221423-10752-14-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1412221423-10752-1-git-send-email-sjg@chromium.org> References: <1412221423-10752-1-git-send-email-sjg@chromium.org> Cc: Chander Kashyap , Przemyslaw Marczak , Ajay Kumar Subject: [U-Boot] [PATCH v5 13/15] samsung: Enable device tree for s5p_goni X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Change this board to add a device tree. This also adds a pinmux header file although it is not used as yet. Signed-off-by: Simon Glass --- Changes in v5: None Changes in v4: - Rebase on top of master (CONFIG_OF settings moved to Kconfig) Changes in v3: - Adjust device tree file based on Robert Baldyga's example Changes in v2: - Avoid using a common file, and just add a device tree - Fix device tree base addresses arch/arm/Kconfig | 9 +++-- arch/arm/cpu/armv7/s5pc1xx/Kconfig | 19 ++++++++++ arch/arm/dts/Makefile | 1 + arch/arm/dts/s5pc1xx-goni.dts | 28 ++++++++++++++ arch/arm/include/asm/arch-s5pc1xx/periph.h | 61 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-s5pc1xx/pinmux.h | 50 ++++++++++++++++++++++++ configs/s5p_goni_defconfig | 1 + drivers/mmc/s5p_sdhci.c | 2 - include/configs/s5p_goni.h | 7 +++- 9 files changed, 171 insertions(+), 7 deletions(-) create mode 100644 arch/arm/cpu/armv7/s5pc1xx/Kconfig create mode 100644 arch/arm/dts/s5pc1xx-goni.dts create mode 100644 arch/arm/include/asm/arch-s5pc1xx/periph.h create mode 100644 arch/arm/include/asm/arch-s5pc1xx/pinmux.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22f0f09..c12a9a3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -334,6 +334,9 @@ config TARGET_BCM958622HR config ARCH_EXYNOS bool "Samsung EXYNOS" +config ARCH_S5PC1XX + bool "Samsung S5PC1XX" + config ARCH_HIGHBANK bool "Calxeda Highbank" @@ -424,9 +427,6 @@ config OMAP54XX config RMOBILE bool "Renesas ARM SoCs" -config TARGET_S5P_GONI - bool "Support s5p_goni" - config TARGET_SMDKC100 bool "Support smdkc100" @@ -533,6 +533,8 @@ source "arch/arm/cpu/arm926ejs/orion5x/Kconfig" source "arch/arm/cpu/armv7/rmobile/Kconfig" +source "arch/arm/cpu/armv7/s5pc1xx/Kconfig" + source "arch/arm/cpu/armv7/tegra-common/Kconfig" source "arch/arm/cpu/arm926ejs/versatile/Kconfig" @@ -635,7 +637,6 @@ source "board/raspberrypi/rpi_b/Kconfig" source "board/ronetix/pm9261/Kconfig" source "board/ronetix/pm9263/Kconfig" source "board/ronetix/pm9g45/Kconfig" -source "board/samsung/goni/Kconfig" source "board/samsung/smdk2410/Kconfig" source "board/samsung/smdkc100/Kconfig" source "board/sandisk/sansa_fuze_plus/Kconfig" diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig new file mode 100644 index 0000000..7919cf8 --- /dev/null +++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig @@ -0,0 +1,19 @@ +if ARCH_S5PC1XX + +choice + prompt "S5PC1XX board select" + +config TARGET_S5P_GONI + bool "S5P Goni board" + +endchoice + +config SYS_CPU + default "armv7" + +config SYS_SOC + default "s5pc1xx" + +source "board/samsung/goni/Kconfig" + +endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f72207d..8a8ee56 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-universal_c210.dtb \ diff --git a/arch/arm/dts/s5pc1xx-goni.dts b/arch/arm/dts/s5pc1xx-goni.dts new file mode 100644 index 0000000..2e671bb --- /dev/null +++ b/arch/arm/dts/s5pc1xx-goni.dts @@ -0,0 +1,28 @@ +/* + * Samsung's S5PC110-based Goni board device tree source + * + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + model = "Samsung Goni based on S5PC110"; + compatible = "samsung,goni", "samsung,s5pc110"; + + aliases { + serial2 = "/serial@e2900800"; + console = "/serial@e2900800"; + }; + + serial@e2900800 { + compatible = "samsung,exynos4210-uart"; + reg = <0xe2900800 0x400>; + id = <2>; + }; + +}; diff --git a/arch/arm/include/asm/arch-s5pc1xx/periph.h b/arch/arm/include/asm/arch-s5pc1xx/periph.h new file mode 100644 index 0000000..5c1c3d4 --- /dev/null +++ b/arch/arm/include/asm/arch-s5pc1xx/periph.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Rajeshwari Shinde + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARM_ARCH_PERIPH_H +#define __ASM_ARM_ARCH_PERIPH_H + +/* + * Peripherals required for pinmux configuration. List will + * grow with support for more devices getting added. + * Numbering based on interrupt table. + * + */ +enum periph_id { + PERIPH_ID_UART0 = 51, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + PERIPH_ID_UART3, + PERIPH_ID_I2C0 = 56, + PERIPH_ID_I2C1, + PERIPH_ID_I2C2, + PERIPH_ID_I2C3, + PERIPH_ID_I2C4, + PERIPH_ID_I2C5, + PERIPH_ID_I2C6, + PERIPH_ID_I2C7, + PERIPH_ID_SPI0 = 68, + PERIPH_ID_SPI1, + PERIPH_ID_SPI2, + PERIPH_ID_SDMMC0 = 75, + PERIPH_ID_SDMMC1, + PERIPH_ID_SDMMC2, + PERIPH_ID_SDMMC3, + PERIPH_ID_I2C8 = 87, + PERIPH_ID_I2C9, + PERIPH_ID_I2S0 = 98, + PERIPH_ID_I2S1 = 99, + + /* Since following peripherals do + * not have shared peripheral interrupts (SPIs) + * they are numbered arbitiraly after the maximum + * SPIs Exynos has (128) + */ + PERIPH_ID_SROMC = 128, + PERIPH_ID_SPI3, + PERIPH_ID_SPI4, + PERIPH_ID_SDMMC4, + PERIPH_ID_PWM0, + PERIPH_ID_PWM1, + PERIPH_ID_PWM2, + PERIPH_ID_PWM3, + PERIPH_ID_PWM4, + PERIPH_ID_I2C10 = 203, + + PERIPH_ID_NONE = -1, +}; + +#endif /* __ASM_ARM_ARCH_PERIPH_H */ diff --git a/arch/arm/include/asm/arch-s5pc1xx/pinmux.h b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h new file mode 100644 index 0000000..0b91ef6 --- /dev/null +++ b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Abhilash Kesavan + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARM_ARCH_PINMUX_H +#define __ASM_ARM_ARCH_PINMUX_H + +#include "periph.h" + +/* + * Flags for setting specific configarations of peripherals. + * List will grow with support for more devices getting added. + */ +enum { + PINMUX_FLAG_NONE = 0x00000000, + + /* Flags for eMMC */ + PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */ + + /* Flags for SROM controller */ + PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */ + PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */ +}; + +/** + * Configures the pinmux for a particular peripheral. + * + * Each gpio can be configured in many different ways (4 bits on exynos) + * such as "input", "output", "special function", "external interrupt" + * etc. This function will configure the peripheral pinmux along with + * pull-up/down and drive strength. + * + * @param peripheral peripheral to be configured + * @param flags configure flags + * @return 0 if ok, -1 on error (e.g. unsupported peripheral) + */ +int exynos_pinmux_config(int peripheral, int flags); + +/** + * Decode the peripheral id using the interrpt numbers. + * + * @param blob Device tree blob + * @param node FDT I2C node to find + * @return peripheral id if ok, PERIPH_ID_NONE on error + */ +int pinmux_decode_periph_id(const void *blob, int node); +#endif diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index c0c3509..da1800f 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_S5PC1XX=y CONFIG_TARGET_S5P_GONI=y diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 2ff0ec2..637dd97 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -14,9 +14,7 @@ #include #include #include -#ifdef CONFIG_OF_CONTROL #include -#endif static char *S5P_NAME = "SAMSUNG SDHCI"; static void s5p_sdhci_set_control_reg(struct sdhci_host *host) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index a51215d..7bba3c5 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -53,6 +53,7 @@ #define CONFIG_MMC #define CONFIG_SDHCI #define CONFIG_S5P_SDHCI +#define SDHCI_MAX_HOSTS 4 /* PWM */ #define CONFIG_PWM 1 @@ -106,7 +107,6 @@ ",12m(modem)"\ ",60m(qboot)\0" -#define CONFIG_BOOTDELAY 1 #define CONFIG_ZERO_BOOTDELAY_CHECK /* partitions definitions */ @@ -283,4 +283,9 @@ #define CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DEFAULT_DEVICE_TREE s5pc1xx-goni + #endif /* __CONFIG_H */