From patchwork Thu Sep 25 05:52:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Qiang X-Patchwork-Id: 393256 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 338BF14016B for ; Thu, 25 Sep 2014 16:27:53 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8D0B74A029; Thu, 25 Sep 2014 08:27:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id x0wUYWgcllkl; Thu, 25 Sep 2014 08:27:49 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 311F54A02A; Thu, 25 Sep 2014 08:27:47 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A50774A02A for ; Thu, 25 Sep 2014 08:27:45 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2iout4o28sjE for ; Thu, 25 Sep 2014 08:27:42 +0200 (CEST) X-Greylist: delayed 2088 seconds by postgrey-1.27 at theia; Thu, 25 Sep 2014 08:27:38 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bn0109.outbound.protection.outlook.com [157.56.110.109]) by theia.denx.de (Postfix) with ESMTPS id 1C8894A029 for ; Thu, 25 Sep 2014 08:27:38 +0200 (CEST) Received: from BL2PR03MB146.namprd03.prod.outlook.com (10.255.230.18) by BL2PR03MB195.namprd03.prod.outlook.com (10.255.230.153) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Thu, 25 Sep 2014 05:52:47 +0000 Received: from BY2PR03CA072.namprd03.prod.outlook.com (10.141.249.45) by BL2PR03MB146.namprd03.prod.outlook.com (10.255.230.18) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Thu, 25 Sep 2014 05:52:45 +0000 Received: from BN1AFFO11FD026.protection.gbl (2a01:111:f400:7c10::137) by BY2PR03CA072.outlook.office365.com (2a01:111:e400:2c5d::45) with Microsoft SMTP Server (TLS) id 15.0.1034.13 via Frontend Transport; Thu, 25 Sep 2014 05:52:45 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD026.mail.protection.outlook.com (10.58.52.86) with Microsoft SMTP Server (TLS) id 15.0.1029.15 via Frontend Transport; Thu, 25 Sep 2014 05:52:44 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s8P5qeqg021991; Wed, 24 Sep 2014 22:52:42 -0700 From: Zhao Qiang To: , Date: Thu, 25 Sep 2014 13:52:25 +0800 Message-ID: <1411624347-28962-1-git-send-email-B45475@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(199003)(189002)(84676001)(89996001)(20776003)(104166001)(88136002)(6806004)(68736004)(50986999)(104016003)(47776003)(93916002)(64706001)(85852003)(83322001)(83072002)(107046002)(19580405001)(44976005)(229853001)(19580395003)(87286001)(92726001)(48376002)(50466002)(102836001)(62966002)(85306004)(81542003)(90102001)(46102003)(79102003)(92566001)(50226001)(77982003)(76482002)(87936001)(120916001)(105606002)(95666004)(4396001)(31966008)(21056001)(74662003)(99396003)(97736003)(81342003)(77156001)(74502003)(10300001)(106466001)(80022003)(36756003)(42262002); DIR:OUT; SFP:1102; SCL:1; SRVR:BL2PR03MB146; H:tx30smr01.am.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB146; X-Forefront-PRVS: 0345CFD558 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=qiang.zhao@freescale.com; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB195; X-OriginatorOrg: freescale.com Cc: Zhao Qiang , R63061@freescale.com Subject: [U-Boot] [PATCH 2/4] qe: add u-qe support to arm board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de ls1021 is arm-core and support qe which is u-qe. add u-qe init for arm board. Signed-off-by: Zhao Qiang --- arch/arm/include/asm/arch-ls102xa/config.h | 4 ++++ arch/arm/include/asm/global_data.h | 8 ++++++++ drivers/Makefile | 1 + drivers/qe/Makefile | 3 ++- drivers/qe/fdt.c | 2 ++ drivers/qe/qe.c | 13 +++++++++++++ drivers/qe/qe.h | 1 + 7 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index ed78c33..526ceb4 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -65,6 +65,10 @@ #define DCU_LAYER_MAX_NUM 16 +#define QE_MURAM_SIZE 0x6000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 + #define CONFIG_SYS_FSL_SRDS_1 #ifdef CONFIG_LS102XA diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 63e4ad5..900f127 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -17,6 +17,14 @@ struct arch_global_data { #if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif + +#if defined(CONFIG_U_QE) + u32 qe_clk; + u32 brg_clk; + uint mp_alloc_base; + uint mp_alloc_top; +#endif /* CONFIG_U_QE */ + #ifdef CONFIG_AT91FAMILY /* "static data" needed by at91's clock.c */ unsigned long cpu_clk_rate_hz; diff --git a/drivers/Makefile b/drivers/Makefile index b23076f..f4ae477 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -14,4 +14,5 @@ obj-y += twserial/ obj-y += video/ obj-y += watchdog/ obj-$(CONFIG_QE) += qe/ +obj-$(CONFIG_U_QE) += qe/ obj-y += memory/ diff --git a/drivers/qe/Makefile b/drivers/qe/Makefile index 7f1bd06..8fa4866 100644 --- a/drivers/qe/Makefile +++ b/drivers/qe/Makefile @@ -4,5 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := qe.o uccf.o uec.o uec_phy.o +obj-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o +obj-$(CONFIG_U_QE) += qe.o obj-$(CONFIG_OF_LIBFDT) += fdt.o diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c index d9a7d82..dfae4bf 100644 --- a/drivers/qe/fdt.c +++ b/drivers/qe/fdt.c @@ -12,6 +12,7 @@ #include #include "qe.h" +#ifdef CONFIG_QE DECLARE_GLOBAL_DATA_PTR; /* @@ -72,3 +73,4 @@ void ft_qe_setup(void *blob) "clock-frequency", gd->arch.qe_clk / 2, 1); fdt_fixup_qe_firmware(blob); } +#endif diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index be09a17..075fd48 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -40,6 +40,7 @@ void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data) return; } +#ifdef CONFIG_QE uint qe_muram_alloc(uint size, uint align) { uint retloc; @@ -70,6 +71,7 @@ uint qe_muram_alloc(uint size, uint align) return retloc; } +#endif void *qe_muram_addr(uint offset) { @@ -180,6 +182,15 @@ void qe_init(uint qe_base) qe_snums_init(); } +void u_qe_init(void) +{ + uint qe_base = CONFIG_SYS_IMMR + 0x01400000; /* QE immr base */ + qe_immr = (qe_map_t *)qe_base; + + qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR); + out_be32(&qe_immr->iram.iready, QE_IRAM_READY); +} + void qe_reset(void) { qe_issue_cmd(QE_RESET, QE_CR_SUBBLOCK_INVALID, @@ -212,6 +223,7 @@ void qe_assign_page(uint snum, uint para_ram_base) #define BRG_CLK (gd->arch.brg_clk) +#ifdef CONFIG_QE int qe_set_brg(uint brg, uint rate) { volatile uint *bp; @@ -239,6 +251,7 @@ int qe_set_brg(uint brg, uint rate) return 0; } +#endif /* Set ethernet MII clock master */ diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index ebb7c5f..30484b8 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -275,6 +275,7 @@ void *qe_muram_addr(uint offset); int qe_get_snum(void); void qe_put_snum(u8 snum); void qe_init(uint qe_base); +void u_qe_init(void); void qe_reset(void); void qe_assign_page(uint snum, uint para_ram_base); int qe_set_brg(uint brg, uint rate);