From patchwork Tue Sep 23 08:45:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rostislav Lisovy X-Patchwork-Id: 392273 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5A90B14009E for ; Tue, 23 Sep 2014 18:46:10 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD4A5A740E; Tue, 23 Sep 2014 10:46:07 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3naXf3-2LAVw; Tue, 23 Sep 2014 10:46:07 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 989B7A73EF; Tue, 23 Sep 2014 10:46:05 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3E6F1A73EF for ; Tue, 23 Sep 2014 10:46:00 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jBrXsRi52XKO for ; Tue, 23 Sep 2014 10:45:56 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-we0-f169.google.com (mail-we0-f169.google.com [74.125.82.169]) by theia.denx.de (Postfix) with ESMTPS id 8A8D7A73EA for ; Tue, 23 Sep 2014 10:45:52 +0200 (CEST) Received: by mail-we0-f169.google.com with SMTP id k48so4185635wev.14 for ; Tue, 23 Sep 2014 01:45:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=mjrMulks8ak2DkdEEtr6qpXfevnWOgnuHieU3DnpdwU=; b=rOY2SnLo6Wvzg2llIAU/Lbzoc4JxHGSMKwDh34nE9eEpH1z+m1rroMNjd2uaOW+eQW vH4DiEKMt9wqWlkT/oLmdTc3UN0bTRZaCw+/pZLw57q1zoeUEvAvDKlXqXOavVfV3lmx 3A5I9kFPv6BB31InvawugdJCS9LppfCNHAYBtrYqLc3eYAlYMlFTkiaDkCbNUDaMqEHw xJmRiInp7IN3AfjRFN4g+ho4cepwQAHJMsqnFc2tLJT6wgCdj9QW/6C39E+RKFrJyCG2 2cSCrvOT4jh0cGa76cdJBhVDSdezRFtYdRytnb/2Eh0Flr2YbFyt4kVjuS55z76rYv/D SYiQ== X-Received: by 10.180.100.37 with SMTP id ev5mr20636491wib.49.1411461952246; Tue, 23 Sep 2014 01:45:52 -0700 (PDT) Received: from lp-lvrv.comap.cz ([195.122.193.158]) by mx.google.com with ESMTPSA id fa20sm1477815wic.1.2014.09.23.01.45.51 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Sep 2014 01:45:51 -0700 (PDT) From: Rostislav Lisovy X-Google-Original-From: Rostislav Lisovy To: u-boot@lists.denx.de, Scott Wood Date: Tue, 23 Sep 2014 10:45:46 +0200 Message-Id: <1411461946-2583-1-git-send-email-lisovy@merica.cz> X-Mailer: git-send-email 1.9.1 Cc: Rostislav Lisovy , Ilya Yanok , lisovy@gmail.com, Tom Rini , michal.vokac@comap.cz, sojkam1@fel.cvut.cz Subject: [U-Boot] [PATCH RESEND] mtd: nand: am335x: Fix 'bit-flip' errors in SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de OMAP GPMC driver used with some NAND Flash devices (e.g. Spansion S34ML08G1) causes that U-boot shows hundreds of 'nand: bit-flip corrected' error messages. Possible cause was discussed in the mailinglist thread: http://lists.denx.de/pipermail/u-boot/2014-April/177508.html The issue was partially fixed with the commit cc81a5291910d7a3016a65042bec7b4e54e81d03 however this has to be done to fix the SPL. The original author of the code is Belisko Marek Signed-off-by: Rostislav Lisovy --- drivers/mtd/nand/am335x_spl_bch.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c index ce65d8e..bf8b2ee 100644 --- a/drivers/mtd/nand/am335x_spl_bch.c +++ b/drivers/mtd/nand/am335x_spl_bch.c @@ -64,14 +64,18 @@ static int nand_command(int block, int page, uint32_t offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ hwctrl(&nand_info[0], (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - hwctrl(&nand_info[0], (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff), + if (cmd != NAND_CMD_RNDOUT) { + hwctrl(&nand_info[0], (page_addr & 0xff), + NAND_CTRL_ALE); /* A[19:12] */ + hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE - /* One more address cycle for devices > 128MiB */ - hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f, + /* One more address cycle for devices > 128MiB */ + hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif + } + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); if (cmd == NAND_CMD_READ0) {