From patchwork Sun Sep 21 13:12:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 391689 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C32631400BE for ; Sun, 21 Sep 2014 23:15:24 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D18CAA757E; Sun, 21 Sep 2014 15:15:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8QLDgwzDa5Yr; Sun, 21 Sep 2014 15:15:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0C9F1A75A6; Sun, 21 Sep 2014 15:13:47 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D6F10A7541 for ; Sun, 21 Sep 2014 15:13:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6c8MVX5aJFYS for ; Sun, 21 Sep 2014 15:13:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by theia.denx.de (Postfix) with ESMTPS id 222FB4B675 for ; Sun, 21 Sep 2014 15:12:53 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3j18N46TRmz3hlr1; Sun, 21 Sep 2014 15:12:52 +0200 (CEST) X-Auth-Info: yKNZTbajXMKzN3kUuE2AlcJJ64V50/ggCIMfzg5IoVA= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3j18N429vlzvhTZ; Sun, 21 Sep 2014 15:12:52 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 21 Sep 2014 15:12:23 +0200 Message-Id: <1411305152-11690-15-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1411305152-11690-1-git-send-email-marex@denx.de> References: <1411304339-11348-1-git-send-email-marex@denx.de> <1411305152-11690-1-git-send-email-marex@denx.de> Cc: Marek Vasut , Pavel Machek , Chin Liang See , Tom Rini , sr@denx.de, Dinh Nguyen Subject: [U-Boot] [PATCH 42/51] arm: socfpga: nic301: Add NIC-301 GPV register file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add register definition for the NIC-301 used on SoCFPGA. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Albert Aribaud Cc: Tom Rini Cc: Wolfgang Denk Cc: Pavel Machek Acked-by: Pavel Machek --- arch/arm/include/asm/arch-socfpga/nic301.h | 195 +++++++++++++++++++++++++++++ 1 file changed, 195 insertions(+) create mode 100644 arch/arm/include/asm/arch-socfpga/nic301.h diff --git a/arch/arm/include/asm/arch-socfpga/nic301.h b/arch/arm/include/asm/arch-socfpga/nic301.h new file mode 100644 index 0000000..3c8ab31 --- /dev/null +++ b/arch/arm/include/asm/arch-socfpga/nic301.h @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2014 Marek Vasut + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _NIC301_REGISTERS_H_ +#define _NIC301_REGISTERS_H_ + +struct nic301_registers { + u32 remap; /* 0x0 */ + /* Security Register Group */ + u32 _pad_0x4_0x8[1]; + u32 l4main; + u32 l4sp; + u32 l4mp; /* 0x10 */ + u32 l4osc1; + u32 l4spim; + u32 stm; + u32 lwhps2fpgaregs; /* 0x20 */ + u32 _pad_0x24_0x28[1]; + u32 usb1; + u32 nanddata; + u32 _pad_0x30_0x80[20]; + u32 usb0; /* 0x80 */ + u32 nandregs; + u32 qspidata; + u32 fpgamgrdata; + u32 hps2fpgaregs; /* 0x90 */ + u32 acp; + u32 rom; + u32 ocram; + u32 sdrdata; /* 0xA0 */ + u32 _pad_0xa4_0x1fd0[1995]; + /* ID Register Group */ + u32 periph_id_4; /* 0x1FD0 */ + u32 _pad_0x1fd4_0x1fe0[3]; + u32 periph_id_0; /* 0x1FE0 */ + u32 periph_id_1; + u32 periph_id_2; + u32 periph_id_3; + u32 comp_id_0; /* 0x1FF0 */ + u32 comp_id_1; + u32 comp_id_2; + u32 comp_id_3; + u32 _pad_0x2000_0x2008[2]; + /* L4 MAIN */ + u32 l4main_fn_mod_bm_iss; + u32 _pad_0x200c_0x3008[1023]; + /* L4 SP */ + u32 l4sp_fn_mod_bm_iss; + u32 _pad_0x300c_0x4008[1023]; + /* L4 MP */ + u32 l4mp_fn_mod_bm_iss; + u32 _pad_0x400c_0x5008[1023]; + /* L4 OSC1 */ + u32 l4osc_fn_mod_bm_iss; + u32 _pad_0x500c_0x6008[1023]; + /* L4 SPIM */ + u32 l4spim_fn_mod_bm_iss; + u32 _pad_0x600c_0x7008[1023]; + /* STM */ + u32 stm_fn_mod_bm_iss; + u32 _pad_0x700c_0x7108[63]; + u32 stm_fn_mod; + u32 _pad_0x710c_0x8008[959]; + /* LWHPS2FPGA */ + u32 lwhps2fpga_fn_mod_bm_iss; + u32 _pad_0x800c_0x8108[63]; + u32 lwhps2fpga_fn_mod; + u32 _pad_0x810c_0xa008[1983]; + /* USB1 */ + u32 usb1_fn_mod_bm_iss; + u32 _pad_0xa00c_0xa044[14]; + u32 usb1_ahb_cntl; + u32 _pad_0xa048_0xb008[1008]; + /* NANDDATA */ + u32 nanddata_fn_mod_bm_iss; + u32 _pad_0xb00c_0xb108[63]; + u32 nanddata_fn_mod; + u32 _pad_0xb10c_0x20008[21439]; + /* USB0 */ + u32 usb0_fn_mod_bm_iss; + u32 _pad_0x2000c_0x20044[14]; + u32 usb0_ahb_cntl; + u32 _pad_0x20048_0x21008[1008]; + /* NANDREGS */ + u32 nandregs_fn_mod_bm_iss; + u32 _pad_0x2100c_0x21108[63]; + u32 nandregs_fn_mod; + u32 _pad_0x2110c_0x22008[959]; + /* QSPIDATA */ + u32 qspidata_fn_mod_bm_iss; + u32 _pad_0x2200c_0x22044[14]; + u32 qspidata_ahb_cntl; + u32 _pad_0x22048_0x23008[1008]; + /* FPGAMGRDATA */ + u32 fpgamgrdata_fn_mod_bm_iss; + u32 _pad_0x2300c_0x23040[13]; + u32 fpgamgrdata_wr_tidemark; /* 0x23040 */ + u32 _pad_0x23044_0x23108[49]; + u32 fn_mod; + u32 _pad_0x2310c_0x24008[959]; + /* HPS2FPGA */ + u32 hps2fpga_fn_mod_bm_iss; + u32 _pad_0x2400c_0x24040[13]; + u32 hps2fpga_wr_tidemark; /* 0x24040 */ + u32 _pad_0x24044_0x24108[49]; + u32 hps2fpga_fn_mod; + u32 _pad_0x2410c_0x25008[959]; + /* ACP */ + u32 acp_fn_mod_bm_iss; + u32 _pad_0x2500c_0x25108[63]; + u32 acp_fn_mod; + u32 _pad_0x2510c_0x26008[959]; + /* Boot ROM */ + u32 bootrom_fn_mod_bm_iss; + u32 _pad_0x2600c_0x26108[63]; + u32 bootrom_fn_mod; + u32 _pad_0x2610c_0x27008[959]; + /* On-chip RAM */ + u32 ocram_fn_mod_bm_iss; + u32 _pad_0x2700c_0x27040[13]; + u32 ocram_wr_tidemark; /* 0x27040 */ + u32 _pad_0x27044_0x27108[49]; + u32 ocram_fn_mod; + u32 _pad_0x2710c_0x42024[27590]; + /* DAP */ + u32 dap_fn_mod2; + u32 dap_fn_mod_ahb; + u32 _pad_0x4202c_0x42100[53]; + u32 dap_read_qos; /* 0x42100 */ + u32 dap_write_qos; + u32 dap_fn_mod; + u32 _pad_0x4210c_0x43100[1021]; + /* MPU */ + u32 mpu_read_qos; /* 0x43100 */ + u32 mpu_write_qos; + u32 mpu_fn_mod; + u32 _pad_0x4310c_0x44028[967]; + /* SDMMC */ + u32 sdmmc_fn_mod_ahb; + u32 _pad_0x4402c_0x44100[53]; + u32 sdmmc_read_qos; /* 0x44100 */ + u32 sdmmc_write_qos; + u32 sdmmc_fn_mod; + u32 _pad_0x4410c_0x45100[1021]; + /* DMA */ + u32 dma_read_qos; /* 0x45100 */ + u32 dma_write_qos; + u32 dma_fn_mod; + u32 _pad_0x4510c_0x46040[973]; + /* FPGA2HPS */ + u32 fpga2hps_wr_tidemark; /* 0x46040 */ + u32 _pad_0x46044_0x46100[47]; + u32 fpga2hps_read_qos; /* 0x46100 */ + u32 fpga2hps_write_qos; + u32 fpga2hps_fn_mod; + u32 _pad_0x4610c_0x47100[1021]; + /* ETR */ + u32 etr_read_qos; /* 0x47100 */ + u32 etr_write_qos; + u32 etr_fn_mod; + u32 _pad_0x4710c_0x48100[1021]; + /* EMAC0 */ + u32 emac0_read_qos; /* 0x48100 */ + u32 emac0_write_qos; + u32 emac0_fn_mod; + u32 _pad_0x4810c_0x49100[1021]; + /* EMAC1 */ + u32 emac1_read_qos; /* 0x49100 */ + u32 emac1_write_qos; + u32 emac1_fn_mod; + u32 _pad_0x4910c_0x4a028[967]; + /* USB0 */ + u32 usb0_fn_mod_ahb; + u32 _pad_0x4a02c_0x4a100[53]; + u32 usb0_read_qos; /* 0x4A100 */ + u32 usb0_write_qos; + u32 usb0_fn_mod; + u32 _pad_0x4a10c_0x4b100[1021]; + /* NAND */ + u32 nand_read_qos; /* 0x4B100 */ + u32 nand_write_qos; + u32 nand_fn_mod; + u32 _pad_0x4b10c_0x4c028[967]; + /* USB1 */ + u32 usb1_fn_mod_ahb; + u32 _pad_0x4c02c_0x4c100[53]; + u32 usb1_read_qos; /* 0x4C100 */ + u32 usb1_write_qos; + u32 usb1_fn_mod; +}; + +#endif /* _NIC301_REGISTERS_H_ */