From patchwork Sun Aug 24 19:31:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Schuknecht X-Patchwork-Id: 382536 X-Patchwork-Delegate: panto@antoniou-consulting.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0B1631400A0 for ; Mon, 25 Aug 2014 05:37:28 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 413864B609; Sun, 24 Aug 2014 21:37:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KSs+4886dlG9; Sun, 24 Aug 2014 21:37:23 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3AB1A4B60F; Sun, 24 Aug 2014 21:37:22 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9A7954B60F for ; Sun, 24 Aug 2014 21:37:17 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4AJM6+RMurLf for ; Sun, 24 Aug 2014 21:37:15 +0200 (CEST) X-Greylist: delayed 321 seconds by postgrey-1.27 at theia; Sun, 24 Aug 2014 21:37:12 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from zk223.dresearch-fe.de (zk223.dresearch-fe.de [217.92.177.116]) by theia.denx.de (Postfix) with ESMTP id 399084B609 for ; Sun, 24 Aug 2014 21:37:12 +0200 (CEST) Received: from fsc-480-012-88.intern.dresearch-fe.de (fsc-480-012-88.internal.dresearch-fe.de [172.29.23.5]) by zk223.dresearch-fe.de (Postfix) with ESMTP id 09317E00BD; Sun, 24 Aug 2014 21:31:50 +0200 (CEST) Received: by fsc-480-012-88.intern.dresearch-fe.de (Postfix, from userid 1006) id D3CE1720E1; Sun, 24 Aug 2014 21:31:49 +0200 (CEST) From: Mario Schuknecht To: u-boot@lists.denx.de Date: Sun, 24 Aug 2014 21:31:16 +0200 Message-Id: <1408908676-25989-1-git-send-email-mario.schuknecht@dresearch-fe.de> X-Mailer: git-send-email 1.8.4.5 Cc: drEagle@doukki.net, Mario Schuknecht , sr@denx.de, panto@antoniou-consulting.com Subject: [U-Boot] [PATCH] mvebu_mmc: Driver addition X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de In function mvebu_mmc_write notice command timeout. It is possible that a command is done, but a timeout occurred. Enable timeout in set bus function. Set window registers. Without that I could not use the driver on a Kirkwood 88F6282 SoC. Set high capacity and 52MHz driver feature. Signed-off-by: Mario Schuknecht --- drivers/mmc/mvebu_mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c index 9759198..53754aa 100644 --- a/drivers/mmc/mvebu_mmc.c +++ b/drivers/mmc/mvebu_mmc.c @@ -17,8 +17,12 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define DRIVER_NAME "MVEBU_MMC" +#define MVEBU_TARGET_DRAM 0 + static void mvebu_mmc_write(u32 offs, u32 val) { writel(val, CONFIG_SYS_MMC_BASE + (offs)); @@ -164,6 +168,9 @@ static int mvebu_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return TIMEOUT; } } + if (mvebu_mmc_read(SDIO_ERR_INTR_STATUS) & + (SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT)) + return TIMEOUT; /* Handling response */ if (cmd->resp_type & MMC_RSP_136) { @@ -271,6 +278,7 @@ static void mvebu_mmc_set_bus(unsigned int bus) /* default to maximum timeout */ ctrl_reg |= SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX); + ctrl_reg |= SDIO_HOST_CTRL_TMOUT_EN; ctrl_reg |= SDIO_HOST_CTRL_PUSH_PULL_EN; @@ -296,6 +304,53 @@ static void mvebu_mmc_set_ios(struct mmc *mmc) mvebu_mmc_set_clk(mmc->clock); } +/* + * Set window register. + */ +static void mvebu_window_setup(void) +{ + int i; + + for (i = 0; i < 4; i++) { + mvebu_mmc_write(WINDOW_CTRL(i), 0); + mvebu_mmc_write(WINDOW_BASE(i), 0); + } + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + u32 size, base, attrib; + + /* Enable DRAM bank */ + switch (i) { + case 0: + attrib = KWCPU_ATTR_DRAM_CS0; + break; + case 1: + attrib = KWCPU_ATTR_DRAM_CS1; + break; + case 2: + attrib = KWCPU_ATTR_DRAM_CS2; + break; + case 3: + attrib = KWCPU_ATTR_DRAM_CS3; + break; + default: + /* invalide bank, disable access */ + attrib = 0; + break; + } + + size = gd->bd->bi_dram[i].size; + base = gd->bd->bi_dram[i].start; + if ((size) && (attrib)) + mvebu_mmc_write(WINDOW_CTRL(i), + MVCPU_WIN_CTRL_DATA(size, MVEBU_TARGET_DRAM, + attrib, MVCPU_WIN_ENABLE)); + else + mvebu_mmc_write(WINDOW_CTRL(i), MVCPU_WIN_DISABLE); + + mvebu_mmc_write(WINDOW_BASE(i), base); + } +} + static int mvebu_mmc_initialize(struct mmc *mmc) { debug("%s: mvebu_mmc_initialize", DRIVER_NAME); @@ -322,6 +377,8 @@ static int mvebu_mmc_initialize(struct mmc *mmc) mvebu_mmc_write(SDIO_NOR_INTR_EN, 0); mvebu_mmc_write(SDIO_ERR_INTR_EN, 0); + mvebu_window_setup(); + /* SW reset */ mvebu_mmc_write(SDIO_SW_RESET, SDIO_SW_RESET_NOW); @@ -342,7 +399,7 @@ static struct mmc_config mvebu_mmc_cfg = { .f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX, .f_max = MVEBU_MMC_CLOCKRATE_MAX, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .host_caps = MMC_MODE_4BIT | MMC_MODE_HS, + .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HC | MMC_MODE_HS_52MHz, .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, };