From patchwork Wed Aug 20 12:09:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nikita Kiryanov X-Patchwork-Id: 381645 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4162714010C for ; Wed, 20 Aug 2014 22:15:16 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3EE39A7473; Wed, 20 Aug 2014 14:14:23 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vWOus3spZPdA; Wed, 20 Aug 2014 14:14:23 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8A73DA740F; Wed, 20 Aug 2014 14:12:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6CBA1A7423 for ; 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Wed, 20 Aug 2014 15:11:31 +0300 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id B1B5648424C; Wed, 20 Aug 2014 15:11:29 +0300 (IDT) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id E8hHMdmHu4Hm; Wed, 20 Aug 2014 15:11:22 +0300 (IDT) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id A600A48423F; Wed, 20 Aug 2014 15:11:19 +0300 (IDT) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id GDqpNETJENmw; Wed, 20 Aug 2014 15:11:19 +0300 (IDT) Received: from skynet.compulab.local (nikita-pc.compulab.local [192.168.11.211]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 8F5BD48423A; Wed, 20 Aug 2014 15:11:18 +0300 (IDT) From: Nikita Kiryanov To: u-boot@lists.denx.de Date: Wed, 20 Aug 2014 15:09:02 +0300 Message-Id: <1408536546-15785-16-git-send-email-nikita@compulab.co.il> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1408536546-15785-1-git-send-email-nikita@compulab.co.il> References: <1408536546-15785-1-git-send-email-nikita@compulab.co.il> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - lists.denx.de X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_relayhosts_text_entry: nikita@compulab.co.il|compulab.co.il Cc: Tom Rini Subject: [U-Boot] [PATCH V4 15/19] arm: mx6: cm_fx6: add ethernet support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add ethernet support for Compulab CM-FX6 CoM Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Acked-by: Igor Grinberg Signed-off-by: Nikita Kiryanov --- Changes in V4: - No changes Changes in V3: - No changes Changes in V2: - No changes board/compulab/cm_fx6/cm_fx6.c | 100 +++++++++++++++++++++++++++++++++++++++++ board/compulab/cm_fx6/common.h | 1 + include/configs/cm_fx6.h | 16 ++++++- 3 files changed, 115 insertions(+), 2 deletions(-) diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 17c3ee5..681b1ee 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -10,13 +10,100 @@ #include #include +#include +#include +#include #include #include #include +#include #include "common.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_FEC_MXC +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +static int mx6_rgmii_rework(struct phy_device *phydev) +{ + unsigned short val; + + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + mx6_rgmii_rework(phydev); + + if (phydev->drv->config) + return phydev->drv->config(phydev); + + return 0; +} + +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_0__CCM_CLKO1 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(0x84)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), +}; + +int board_eth_init(bd_t *bis) +{ + SETUP_IOMUX_PADS(enet_pads); + /* phy reset */ + gpio_direction_output(CM_FX6_ENET_NRST, 0); + udelay(500); + gpio_set_value(CM_FX6_ENET_NRST, 1); + enable_enet_clk(1); + return cpu_eth_init(bis); +} +#endif + #ifdef CONFIG_NAND_MXS static iomux_v3_cfg_t const nand_pads[] = { IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), @@ -79,6 +166,19 @@ int board_mmc_init(bd_t *bis) } #endif +#ifdef CONFIG_OF_BOARD_SETUP +void ft_board_setup(void *blob, bd_t *bd) +{ + uint8_t enetaddr[6]; + + /* MAC addr */ + if (eth_getenv_enetaddr("ethaddr", enetaddr)) { + fdt_find_and_setprop(blob, "/fec", "local-mac-address", + enetaddr, 6, 1); + } +} +#endif + int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h index 347d07b..1b19f16 100644 --- a/board/compulab/cm_fx6/common.h +++ b/board/compulab/cm_fx6/common.h @@ -15,6 +15,7 @@ #define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30) #define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) void cm_fx6_set_usdhc_iomux(void); void cm_fx6_set_ecspi_iomux(void); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 4c1bcb9..22b3376 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -35,8 +35,6 @@ #undef CONFIG_CMD_XIMG #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS /* MMC */ #define CONFIG_MMC @@ -189,6 +187,19 @@ #define CONFIG_APBH_DMA_BURST8 #endif +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_XCV_TYPE RGMII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_MII +#define CONFIG_ETHPRIME "FEC0" +#define CONFIG_ARP_TIMEOUT 200UL +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_NET_RETRY_COUNT 5 + /* GPIO */ #define CONFIG_MXC_GPIO @@ -206,6 +217,7 @@ #define CONFIG_STACKSIZE (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_OF_BOARD_SETUP /* SPL */ #include "imx6_spl.h"