From patchwork Tue Aug 5 07:10:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 376599 X-Patchwork-Delegate: prafulla@marvell.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1C582140087 for ; Tue, 5 Aug 2014 17:13:27 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2DCEB37D8; Tue, 5 Aug 2014 09:12:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z0n90v35tDML; Tue, 5 Aug 2014 09:12:40 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 44E37B3850; Tue, 5 Aug 2014 09:10:03 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 64E24B37CB for ; Tue, 5 Aug 2014 09:09:33 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id B2hPm6fM78pI for ; Tue, 5 Aug 2014 09:09:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo4-p05-ob.smtp.rzone.de (mo4-p05-ob.smtp.rzone.de [81.169.146.180]) by theia.denx.de (Postfix) with ESMTPS id 6AB1FB37D9 for ; Tue, 5 Aug 2014 09:09:04 +0200 (CEST) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohfvxEndrDXKjzPMsB3oimjD61I4fPQhgcxm93 X-RZG-CLASS-ID: mo05 Received: from stefan-work.domain_not_set.invalid (b9168f0c.cgn.dg-w.de [185.22.143.12]) by post.strato.de (RZmta 35.2 AUTH) with ESMTPA id Y01725q7578xqIv; Tue, 5 Aug 2014 09:08:59 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Date: Tue, 5 Aug 2014 09:10:06 +0200 Message-Id: <1407222612-1048-21-git-send-email-sr@denx.de> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1407222612-1048-1-git-send-email-sr@denx.de> References: <1407222612-1048-1-git-send-email-sr@denx.de> Cc: trini@ti.com Subject: [U-Boot] [PATCH v2 20/25] arm: armada-xp: Add basic support for the maxBCM board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It integrates an SPI NOR flash and an Marvell 88E6185 switch. Signed-off-by: Stefan Roese --- Changes in v2: None arch/arm/Kconfig | 4 +++ board/maxbcm/Kconfig | 19 ++++++++++++ board/maxbcm/MAINTAINERS | 6 ++++ board/maxbcm/Makefile | 7 +++++ board/maxbcm/kwbimage.cfg | 12 ++++++++ board/maxbcm/maxbcm.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++ configs/maxbcm_defconfig | 2 ++ include/configs/maxbcm.h | 67 +++++++++++++++++++++++++++++++++++++++++ 8 files changed, 194 insertions(+) create mode 100644 board/maxbcm/Kconfig create mode 100644 board/maxbcm/MAINTAINERS create mode 100644 board/maxbcm/Makefile create mode 100644 board/maxbcm/kwbimage.cfg create mode 100644 board/maxbcm/maxbcm.c create mode 100644 configs/maxbcm_defconfig create mode 100644 include/configs/maxbcm.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 884f248..a77a08d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -236,6 +236,9 @@ config TARGET_GOFLEXHOME config TARGET_DB_MV784MP_GP bool "Support db-mv784mp-gp" +config TARGET_MAXBCM + bool "Support maxbcm" + config TARGET_DEVKIT3250 bool "Support devkit3250" @@ -909,6 +912,7 @@ source "board/logicpd/imx31_litekit/Kconfig" source "board/logicpd/omap3som/Kconfig" source "board/logicpd/zoom1/Kconfig" source "board/matrix_vision/mvblx/Kconfig" +source "board/maxbcm/Kconfig" source "board/mpl/vcma9/Kconfig" source "board/nokia/rx51/Kconfig" source "board/nvidia/beaver/Kconfig" diff --git a/board/maxbcm/Kconfig b/board/maxbcm/Kconfig new file mode 100644 index 0000000..d34e2ab --- /dev/null +++ b/board/maxbcm/Kconfig @@ -0,0 +1,19 @@ +if TARGET_MAXBCM + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "maxbcm" + +config SYS_SOC + string + default "armada-xp" + +config SYS_CONFIG_NAME + string + default "maxbcm" + +endif diff --git a/board/maxbcm/MAINTAINERS b/board/maxbcm/MAINTAINERS new file mode 100644 index 0000000..3c8af21 --- /dev/null +++ b/board/maxbcm/MAINTAINERS @@ -0,0 +1,6 @@ +MAXBCM BOARD +M: Stefan Roese +S: Maintained +F: board/maxbcm/ +F: include/configs/maxbcm.h +F: configs/maxbcm_defconfig diff --git a/board/maxbcm/Makefile b/board/maxbcm/Makefile new file mode 100644 index 0000000..37c17d6 --- /dev/null +++ b/board/maxbcm/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := maxbcm.o diff --git a/board/maxbcm/kwbimage.cfg b/board/maxbcm/kwbimage.cfg new file mode 100644 index 0000000..5a3bc67 --- /dev/null +++ b/board/maxbcm/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/maxbcm/binary.0 0000005b 00000068 diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c new file mode 100644 index 0000000..7fc83ee --- /dev/null +++ b/board/maxbcm/maxbcm.c @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2014 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* Base addresses for the external device chip selects */ +#define DEV_CS0_BASE 0xe0000000 +#define DEV_CS1_BASE 0xe1000000 +#define DEV_CS2_BASE 0xe2000000 +#define DEV_CS3_BASE 0xe3000000 + +/* Needed for dynamic (board-specific) mbus configuration */ +extern struct mvebu_mbus_state mbus_state; + +int board_early_init_f(void) +{ + /* + * Don't configure MPP (pin multiplexing) and GPIO here, + * its already done in bin_hdr + */ + + /* + * Setup some board specific mbus address windows + */ + mbus_dt_setup_win(&mbus_state, DEV_CS0_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS0); + mbus_dt_setup_win(&mbus_state, DEV_CS1_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1); + mbus_dt_setup_win(&mbus_state, DEV_CS2_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS2); + mbus_dt_setup_win(&mbus_state, DEV_CS3_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS3); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: maxBCM\n"); + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* Configure and enable MV88E6185 switch */ +void reset_phy(void) +{ + u16 devadr = CONFIG_PHY_BASE_ADDR; + char *name = "neta0"; + u16 reg; + + if (miiphy_set_current_dev(name)) + return; + + /* todo: fill this with the real setup / config code */ + + printf("88E6185 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig new file mode 100644 index 0000000..3d066c6 --- /dev/null +++ b/configs/maxbcm_defconfig @@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_DB_MV784MP-GP=y diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h new file mode 100644 index 0000000..f47042d --- /dev/null +++ b/include/configs/maxbcm.h @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2014 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_DB_MV7846MP_GP_H +#define _CONFIG_DB_MV7846MP_GP_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO_LATE + +#define CONFIG_SYS_TEXT_BASE 0x04000000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_I2C +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#define CONFIG_CMD_TIME + +/* I2C */ +#define CONFIG_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#define CONFIG_SPI_FLASH_STMICRO + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define CONFIG_PHY_BASE_ADDR 0x0 +#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ +#define CONFIG_RESET_PHY_R + +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_ALT_MEMTEST + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#endif /* _CONFIG_DB_MV7846MP_GP_H */