From patchwork Tue Jul 22 00:34:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 372306 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E623B14013B for ; Tue, 22 Jul 2014 10:36:39 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD198A7497; Tue, 22 Jul 2014 02:36:19 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1JG7OOHCbfFW; Tue, 22 Jul 2014 02:36:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 50731A74A6; Tue, 22 Jul 2014 02:35:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7A495A747B for ; Tue, 22 Jul 2014 02:35:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id keuf5aCNqogQ for ; Tue, 22 Jul 2014 02:35:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 46862A7462 for ; Tue, 22 Jul 2014 02:35:05 +0200 (CEST) Received: from frontend1.mail.m-online.net (frontend1.mail.intern.m-online.net [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3hHLRn6Q0Jz3hhpX; Tue, 22 Jul 2014 02:35:01 +0200 (CEST) X-Auth-Info: FpsuNT5TdLgBOjLjqrg472WoHt5Qsl+nOMem1/IPGTQ= Received: from chi.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3hHLRn45Vqz7S6S4; Tue, 22 Jul 2014 02:35:01 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Tue, 22 Jul 2014 02:34:45 +0200 Message-Id: <1405989293-6629-4-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1405989293-6629-1-git-send-email-marex@denx.de> References: <1405989293-6629-1-git-send-email-marex@denx.de> Cc: Marek Vasut , Vladimir Zapolskiy , Kyungmin Park , Scott Wood Subject: [U-Boot] [PATCH 04/12] mtd: nand: s3c: Unify the register definition and naming X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Merge struct s3c2410_nand and struct s3c2440_nand into one unified struct s3c24x0_nand. While at it, fix up and rename the functions to retrieve the NAND base address and fix up the s3c NAND driver to reflect this change. Signed-off-by: Marek Vasut Cc: Kyungmin Park Cc: Lukasz Majewski Cc: Minkyu Kang Cc: Scott Wood Cc: Vladimir Zapolskiy --- arch/arm/include/asm/arch-s3c24x0/s3c2410.h | 4 +-- arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 4 +-- arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 31 ++++++++++++----------- drivers/mtd/nand/s3c2410_nand.c | 38 ++++++++++++++--------------- 4 files changed, 38 insertions(+), 39 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h index 01fe0f2..1a925fb 100644 --- a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h +++ b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h @@ -83,9 +83,9 @@ static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; } -static inline struct s3c2410_nand *s3c2410_get_base_nand(void) +static inline struct s3c24x0_nand *s3c24x0_get_base_nand(void) { - return (struct s3c2410_nand *)S3C2410_NAND_BASE; + return (struct s3c24x0_nand *)S3C2410_NAND_BASE; } static inline struct s3c24x0_uart diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h b/arch/arm/include/asm/arch-s3c24x0/s3c2440.h index 15a7cb4..bf21bb9 100644 --- a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h +++ b/arch/arm/include/asm/arch-s3c24x0/s3c2440.h @@ -81,9 +81,9 @@ static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; } -static inline struct s3c2440_nand *s3c2440_get_base_nand(void) +static inline struct s3c24x0_nand *s3c24x0_get_base_nand(void) { - return (struct s3c2440_nand *)S3C2440_NAND_BASE; + return (struct s3c24x0_nand *)S3C2440_NAND_BASE; } static inline struct s3c24x0_uart diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h index 86d720c..0621e16 100644 --- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h +++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h @@ -135,34 +135,33 @@ struct s3c24x0_lcd { }; -#ifdef CONFIG_S3C2410 -/* NAND FLASH (see S3C2410 manual chapter 6) */ -struct s3c2410_nand { - u32 nfconf; - u32 nfcmd; - u32 nfaddr; - u32 nfdata; - u32 nfstat; - u32 nfecc; -}; -#endif -#ifdef CONFIG_S3C2440 -/* NAND FLASH (see S3C2440 manual chapter 6) */ -struct s3c2440_nand { +/* NAND FLASH (see manual chapter 6) */ +struct s3c24x0_nand { u32 nfconf; +#ifndef CONFIG_S3C2410 u32 nfcont; +#endif u32 nfcmd; u32 nfaddr; u32 nfdata; +#ifndef CONFIG_S3C2410 u32 nfeccd0; u32 nfeccd1; u32 nfeccd; +#endif u32 nfstat; +#ifdef CONFIG_S3C2410 + u32 nfecc; +#else u32 nfstat0; u32 nfstat1; -}; + u32 nfmecc0; + u32 nfmecc1; + u32 nfsecc; + u32 nfsblk; + u32 nfeblk; #endif - +}; /* UART (see manual chapter 11) */ struct s3c24x0_uart { diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index b607cc5..f638801 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -38,10 +38,10 @@ static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) } #endif -static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) +static void s3c24x0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *chip = mtd->priv; - struct s3c2410_nand *nand = s3c2410_get_base_nand(); + struct s3c24x0_nand *nand = s3c24x0_get_base_nand(); debug("hwcontrol(): 0x%08x 0x%08x\n", cmd, ctrl); @@ -67,35 +67,35 @@ static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) writeb(cmd, chip->IO_ADDR_W); } -static int s3c2410_dev_ready(struct mtd_info *mtd) +static int s3c24x0_dev_ready(struct mtd_info *mtd) { - struct s3c2410_nand *nand = s3c2410_get_base_nand(); + struct s3c24x0_nand *nand = s3c24x0_get_base_nand(); debug("dev_ready\n"); return readl(&nand->nfstat) & 0x01; } #ifdef CONFIG_S3C2410_NAND_HWECC -void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) +void s3c24x0_nand_enable_hwecc(struct mtd_info *mtd, int mode) { - struct s3c2410_nand *nand = s3c2410_get_base_nand(); - debug("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode); + struct s3c24x0_nand *nand = s3c24x0_get_base_nand(); + debug("s3c24x0_nand_enable_hwecc(%p, %d)\n", mtd, mode); writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf); } -static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, +static int s3c24x0_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { - struct s3c2410_nand *nand = s3c2410_get_base_nand(); + struct s3c24x0_nand *nand = s3c24x0_get_base_nand(); ecc_code[0] = readb(&nand->nfecc); ecc_code[1] = readb(&nand->nfecc + 1); ecc_code[2] = readb(&nand->nfecc + 2); - debug("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", - mtd , ecc_code[0], ecc_code[1], ecc_code[2]); + debug("s3c24x0_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", + mtd , ecc_code[0], ecc_code[1], ecc_code[2]); return 0; } -static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, +static int s3c24x0_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) { if (read_ecc[0] == calc_ecc[0] && @@ -103,7 +103,7 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, read_ecc[2] == calc_ecc[2]) return 0; - printf("s3c2410_nand_correct_data: not implemented\n"); + printf("s3c24x0_nand_correct_data: not implemented\n"); return -1; } #endif @@ -113,7 +113,7 @@ int board_nand_init(struct nand_chip *nand) u_int32_t cfg; u_int8_t tacls, twrph0, twrph1; struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); - struct s3c2410_nand *nand_reg = s3c2410_get_base_nand(); + struct s3c24x0_nand *nand_reg = s3c24x0_get_base_nand(); debug("board_nand_init()\n"); @@ -149,14 +149,14 @@ int board_nand_init(struct nand_chip *nand) #endif /* hwcontrol always must be implemented */ - nand->cmd_ctrl = s3c2410_hwcontrol; + nand->cmd_ctrl = s3c24x0_hwcontrol; - nand->dev_ready = s3c2410_dev_ready; + nand->dev_ready = s3c24x0_dev_ready; #ifdef CONFIG_S3C2410_NAND_HWECC - nand->ecc.hwctl = s3c2410_nand_enable_hwecc; - nand->ecc.calculate = s3c2410_nand_calculate_ecc; - nand->ecc.correct = s3c2410_nand_correct_data; + nand->ecc.hwctl = s3c24x0_nand_enable_hwecc; + nand->ecc.calculate = s3c24x0_nand_calculate_ecc; + nand->ecc.correct = s3c24x0_nand_correct_data; nand->ecc.mode = NAND_ECC_HW; nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;