From patchwork Thu Jul 3 07:24:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Wang X-Patchwork-Id: 366608 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4DD9A1400A7 for ; Thu, 3 Jul 2014 18:10:56 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E2A7D4B5FF; Thu, 3 Jul 2014 10:10:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TDDyXVwmI-59; Thu, 3 Jul 2014 10:10:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C21ABA73DD; Thu, 3 Jul 2014 10:10:21 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 784E54A056 for ; Thu, 3 Jul 2014 10:10:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id s7lNNTN+wO9w for ; Thu, 3 Jul 2014 10:10:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2lp0238.outbound.protection.outlook.com [207.46.163.238]) by theia.denx.de (Postfix) with ESMTPS id 713874B14B for ; Thu, 3 Jul 2014 10:09:58 +0200 (CEST) Received: from BLUPR03CA034.namprd03.prod.outlook.com (10.141.30.27) by DM2PR03MB382.namprd03.prod.outlook.com (10.141.55.14) with Microsoft SMTP Server (TLS) id 15.0.974.11; Thu, 3 Jul 2014 08:09:46 +0000 Received: from BL2FFO11FD038.protection.gbl (2a01:111:f400:7c09::178) by BLUPR03CA034.outlook.office365.com (2a01:111:e400:879::27) with Microsoft SMTP Server (TLS) id 15.0.985.8 via Frontend Transport; Thu, 3 Jul 2014 08:09:45 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD038.mail.protection.outlook.com (10.173.161.134) with Microsoft SMTP Server (TLS) id 15.0.969.12 via Frontend Transport; Thu, 3 Jul 2014 08:09:45 +0000 Received: from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s6389QNW008094; Thu, 3 Jul 2014 01:09:42 -0700 From: Alison Wang To: , , Date: Thu, 3 Jul 2014 15:24:20 +0800 Message-ID: <1404372264-2301-7-git-send-email-b18965@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1404372264-2301-1-git-send-email-b18965@freescale.com> References: <1404372264-2301-1-git-send-email-b18965@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(199002)(189002)(54534003)(2201001)(83322001)(19580395003)(74662001)(44976005)(68736004)(36756003)(97736001)(104016002)(48376002)(50466002)(64706001)(20776003)(104166001)(31966008)(47776003)(69596002)(6806004)(93916002)(77156001)(33646001)(92726001)(81542001)(92566001)(84676001)(26826002)(19580405001)(62966002)(89996001)(102836001)(85306003)(80022001)(87286001)(229853001)(50226001)(76482001)(50986999)(88136002)(99396002)(105606002)(85852003)(81156004)(107046002)(83072002)(76176999)(95666004)(106466001)(74502001)(4396001)(79102001)(87936001)(46102001)(81342001)(77982001)(21056001)(42262001); DIR:OUT; SFP:; SCL:1; SRVR:DM2PR03MB382; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0261CCEEDF Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=alison.wang@freescale.com; X-OriginatorOrg: freescale.com Cc: fabio.estevam@freescale.com Subject: [U-Boot] [PATCH v2 06/10] driver/ddr/freescale: Add support of accumulate ECC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: York Sun If less than 8 ECC pins are used for DDR data bus width smaller than 64 bits, the 8-bit ECC code will be transmitted/received across several beats, and it will be used to check 64-bits of data once 8-bits of ECC are accumulated. Signed-off-by: York Sun --- Change log: v2: no change. drivers/ddr/fsl/ctrl_regs.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index dcf6287..fa9c257 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -693,6 +693,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, unsigned int x32_en = 0; /* x32 enable */ unsigned int pchb8 = 0; /* precharge bit 8 enable */ unsigned int hse; /* Global half strength override */ + unsigned int acc_ecc_en = 0; /* Accumulated ECC enable */ unsigned int mem_halt = 0; /* memory controller halt */ unsigned int bi = 0; /* Bypass initialization */ @@ -736,6 +737,9 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, ba_intlv_ctl = popts->ba_intlv_ctl; hse = popts->half_strength_driver_enable; + /* set when ddr bus width < 64 */ + acc_ecc_en = (dbw != 0 && ecc_en == 1) ? 1 : 0; + ddr->ddr_sdram_cfg = (0 | ((mem_en & 0x1) << 31) | ((sren & 0x1) << 30) @@ -752,6 +756,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, | ((x32_en & 0x1) << 5) | ((pchb8 & 0x1) << 4) | ((hse & 0x1) << 3) + | ((acc_ecc_en & 0x1) << 2) | ((mem_halt & 0x1) << 1) | ((bi & 0x1) << 0) );