From patchwork Fri Jun 27 09:54:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 364835 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D28A71400DD for ; Fri, 27 Jun 2014 19:57:28 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 82EC9A7810; Fri, 27 Jun 2014 11:57:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AYff9njPlYUx; Fri, 27 Jun 2014 11:57:26 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4851CA7816; Fri, 27 Jun 2014 11:55:21 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8B476A77FC for ; Fri, 27 Jun 2014 11:55:05 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sH33Bqjc1691 for ; Fri, 27 Jun 2014 11:55:03 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo4-p04-ob.smtp.rzone.de (mo4-p04-ob.smtp.rzone.de [81.169.146.179]) by theia.denx.de (Postfix) with ESMTPS id D35EDA77E6 for ; Fri, 27 Jun 2014 11:54:47 +0200 (CEST) X-RZG-CLASS-ID: mo04 X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohfvxEndrDXKjzPMsB3oimjD61I4fPQhgcxmp3 Received: from stefan-work.domain_not_set.invalid (b9168f11.cgn.dg-w.de [185.22.143.17]) by post.strato.de (RZmta 34.5 SBL|AUTH) with ESMTPA id R07c6dq5R9sdoMU; Fri, 27 Jun 2014 11:54:39 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Date: Fri, 27 Jun 2014 11:54:49 +0200 Message-Id: <1403862911-6138-4-git-send-email-sr@denx.de> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1403862911-6138-1-git-send-email-sr@denx.de> References: <1403862911-6138-1-git-send-email-sr@denx.de> Cc: trini@ti.com, Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH v1 03/25] spi: kirkwood_spi.c: Some fixes and cleanup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch introduces the clrsetbits_le32() accessor functions in the kirkwood SPI driver. Note that it also includes a fix: - writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); + writel(KWSPI_SMEMRDY, &spireg->ctrl); Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead 0xfffffffe is written into this control register. This is the main reason to use the clrsetbits() functions now. As they make clearing bits much less error prone. Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and spi_cs_deactivate() any more. Its the wrong macro but has the same value as the correct one (KWSPI_CSN_ACT). This is in preparation for use of this driver on the Marvell Armada XP platform as well. Signed-off-by: Stefan Roese Cc: Jagannadha Sutradharudu Teki Reviewed-by: Jagannadha Sutradharudu Teki --- drivers/spi/kirkwood_spi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 942a208..449e9f8 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, if (!slave) return NULL; - writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); + writel(KWSPI_SMEMRDY, &spireg->ctrl); /* calculate spi clock prescaller using max_hz */ data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; @@ -137,12 +137,12 @@ void spi_init(void) void spi_cs_activate(struct spi_slave *slave) { - writel(readl(&spireg->ctrl) | KWSPI_IRQUNMASK, &spireg->ctrl); + setbits_le32(&spireg->ctrl, KWSPI_CSN_ACT); } void spi_cs_deactivate(struct spi_slave *slave) { - writel(readl(&spireg->ctrl) & KWSPI_IRQMASK, &spireg->ctrl); + clrbits_le32(&spireg->ctrl, KWSPI_CSN_ACT); } int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, @@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, * handle data in 8-bit chunks * TBD: 2byte xfer mode to be enabled */ - writel(((readl(&spireg->cfg) & ~KWSPI_XFERLEN_MASK) | - KWSPI_XFERLEN_1BYTE), &spireg->cfg); + clrsetbits_le32(&spireg->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE); while (bitlen > 4) { debug("loopstart bitlen %d\n", bitlen); @@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, if (dout) tmpdout = *(u32 *) dout & 0x0ff; - writel(~KWSPI_SMEMRDIRQ, &spireg->irq_cause); + clrbits_le32(&spireg->irq_cause, KWSPI_SMEMRDIRQ); writel(tmpdout, &spireg->dout); /* Write the data out */ debug("*** spi_xfer: ... %08x written, bitlen %d\n", tmpdout, bitlen);