From patchwork Thu Jun 5 15:15:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 356502 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 81CC614008F for ; Fri, 6 Jun 2014 01:16:22 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 89A394B7AE; Thu, 5 Jun 2014 17:15:59 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1iVf491aAElc; Thu, 5 Jun 2014 17:15:59 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 07934A73F3; Thu, 5 Jun 2014 17:15:47 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 686744A04C for ; Thu, 5 Jun 2014 17:15:42 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id V9q+1upn0LGh for ; Thu, 5 Jun 2014 17:15:39 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qg0-f48.google.com (mail-qg0-f48.google.com [209.85.192.48]) by theia.denx.de (Postfix) with ESMTPS id 2D2144B6A0 for ; Thu, 5 Jun 2014 17:15:34 +0200 (CEST) Received: by mail-qg0-f48.google.com with SMTP id i50so1826739qgf.7 for ; Thu, 05 Jun 2014 08:15:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=0j1q2NiHQptqwnq+CxEnsnJCtflfM2J+WV4NdROe5go=; b=IexejHlQImUsRsUr/qTgKPYwBYSUZNpLjK5qQDqIcVsubjlzjpZT0172n03DsmPYRu A8K1xEGkTC2BmwJp0IRDmHMM8SGoitsnbFLevdl/tqJ0dMzogz4zr3WjvVhfzvacDZXv /EwRN3Td6iviU9+odU92W+TfjtE3FkLSbPIt3ZrJifVNGzz3fJ5md4DqtCqr+vKRWcM8 LJlgdAzEvaHm+JMT+gSyqY+SrTwK0I0sIMYMBl02J0AP4YRyyckIqnyedFEBIxEVdpcs loeA0PoMspT/Naxm9c1pJyF+xN1o7XzRaN3p7DTRCGakthMlLh+ZDVdCh/CNjFSw00YU ohfw== X-Received: by 10.224.112.74 with SMTP id v10mr18262645qap.28.1401981333307; Thu, 05 Jun 2014 08:15:33 -0700 (PDT) Received: from localhost.localdomain (cpe-098-121-186-226.ec.res.rr.com. [98.121.186.226]) by mx.google.com with ESMTPSA id 91sm3894084qgp.41.2014.06.05.08.15.32 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 05 Jun 2014 08:15:32 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Thu, 5 Jun 2014 11:15:29 -0400 Message-Id: <1401981330-25101-3-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1401981330-25101-1-git-send-email-trini@ti.com> References: <1401981330-25101-1-git-send-email-trini@ti.com> Subject: [U-Boot] [PATCH 3/4] power: Add support for the TPS65218 PMIC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and may be used by TI AM335x SoCs. Signed-off-by: Tom Rini --- drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_tps65218.c | 97 ++++++++++++++++++++++++++++++++++++ include/power/tps65218.h | 63 +++++++++++++++++++++++ 3 files changed, 161 insertions(+) create mode 100644 drivers/power/pmic/pmic_tps65218.c create mode 100644 include/power/tps65218.h diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 920bbdc..192df50 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -12,4 +12,5 @@ obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o +obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c new file mode 100644 index 0000000..0952456 --- /dev/null +++ b/drivers/power/pmic/pmic_tps65218.c @@ -0,0 +1,97 @@ +/* + * (C) Copyright 2011-2013 + * Texas Instruments, + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +/** + * tps65218_reg_write() - Generic function that can write a TPS65218 PMIC + * register or bit field regardless of protection + * level. + * + * @prot_level: Register password protection. Use + * TPS65218_PROT_LEVEL_NONE, + * TPS65218_PROT_LEVEL_1 or TPS65218_PROT_LEVEL_2 + * @dest_reg: Register address to write. + * @dest_val: Value to write. + * @mask: Bit mask (8 bits) to be applied. Function will only + * change bits that are set in the bit mask. + * + * @return: 0 for success, not 0 on failure, as per the i2c API + */ +int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, + uchar mask) +{ + uchar read_val; + uchar xor_reg; + int ret; + + /* + * If we are affecting only a bit field, read dest_reg and apply the + * mask + */ + if (mask != TPS65218_MASK_ALL_BITS) { + ret = i2c_read(TPS65218_CHIP_PM, dest_reg, 1, &read_val, 1); + if (ret) + return ret; + read_val &= (~mask); + read_val |= (dest_val & mask); + dest_val = read_val; + } + + if (prot_level > 0) { + xor_reg = dest_reg ^ TPS65218_PASSWORD_UNLOCK; + ret = i2c_write(TPS65218_CHIP_PM, TPS65218_PASSWORD, 1, + &xor_reg, 1); + if (ret) + return ret; + } + + ret = i2c_write(TPS65218_CHIP_PM, dest_reg, 1, &dest_val, 1); + if (ret) + return ret; + + if (prot_level == TPS65218_PROT_LEVEL_2) { + ret = i2c_write(TPS65218_CHIP_PM, TPS65218_PASSWORD, 1, + &xor_reg, 1); + if (ret) + return ret; + + ret = i2c_write(TPS65218_CHIP_PM, dest_reg, 1, &dest_val, 1); + if (ret) + return ret; + } + + return 0; +} + +/** + * tps65218_voltage_update() - Function to change a voltage level, as this + * is a multi-step process. + * @dc_cntrl_reg: DC voltage control register to change. + * @volt_sel: New value for the voltage register + * @return: 0 for success, not 0 on failure. + */ +int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel) +{ + if ((dc_cntrl_reg != TPS65218_DCDC1) && + (dc_cntrl_reg != TPS65218_DCDC2)) + return 1; + + /* set voltage level */ + if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel, + TPS65218_MASK_ALL_BITS)) + return 1; + + /* set GO bit to initiate voltage transition */ + if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_SLEW, + TPS65218_DCDC_GO, TPS65218_DCDC_GO)) + return 1; + + return 0; +} diff --git a/include/power/tps65218.h b/include/power/tps65218.h new file mode 100644 index 0000000..67aa2f8 --- /dev/null +++ b/include/power/tps65218.h @@ -0,0 +1,63 @@ +/* + * (C) Copyright 2014 + * Texas Instruments, + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __POWER_TPS65218_H__ +#define __POWER_TPS65218_H__ + +/* I2C chip address */ +#define TPS65218_CHIP_PM 0x24 + +/* Registers */ +enum { + TPS65218_CHIPID = 0x00, + TPS65218_INT1, + TPS65218_INT2, + TPS65218_INT_MASK1, + TPS65218_INT_MASK2, + TPS65218_STATUS, + TPS65218_CONTROL, + TPS65218_FLAG, + TPS65218_PASSWORD = 0x10, + TPS65218_ENABLE1, + TPS65218_ENABLE2, + TPS65218_CONFIG1, + TPS65218_CONFIG2, + TPS65218_CONFIG3, + TPS65218_DCDC1, + TPS65218_DCDC2, + TPS65218_DCDC3, + TPS65218_DCDC4, + TPS65218_SLEW, + TPS65218_LDO1, + TPS65218_SEQ1 = 0x20, + TPS65218_SEQ2, + TPS65218_SEQ3, + TPS65218_SEQ4, + TPS65218_SEQ5, + TPS65218_SEQ6, + TPS65218_SEQ7, + TPS65218_PMIC_NUM_OF_REGS, +}; + +#define TPS65218_PROT_LEVEL_NONE 0x00 +#define TPS65218_PROT_LEVEL_1 0x01 +#define TPS65218_PROT_LEVEL_2 0x02 + +#define TPS65218_PASSWORD_LOCK_FOR_WRITE 0x00 +#define TPS65218_PASSWORD_UNLOCK 0x7D + +#define TPS65218_DCDC_GO 0x80 + +#define TPS65218_MASK_ALL_BITS 0xFF + +#define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 +#define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 + +int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, + uchar mask); +int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel); +#endif /* __POWER_TPS65218_H__ */