From patchwork Wed Apr 2 23:24:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 336478 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0DDEB140138 for ; Thu, 3 Apr 2014 10:25:53 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7088F4BAED; Thu, 3 Apr 2014 01:25:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WD5EmV5ZLL6u; Thu, 3 Apr 2014 01:25:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1C28B4BA92; Thu, 3 Apr 2014 01:25:34 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BFE9E4BA92 for ; Thu, 3 Apr 2014 01:25:31 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0+Syl-OJ8qxZ for ; Thu, 3 Apr 2014 01:25:28 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yh0-f74.google.com (mail-yh0-f74.google.com [209.85.213.74]) by theia.denx.de (Postfix) with ESMTPS id 387924BA57 for ; Thu, 3 Apr 2014 01:25:25 +0200 (CEST) Received: by mail-yh0-f74.google.com with SMTP id f10so140148yha.3 for ; Wed, 02 Apr 2014 16:25:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OqMKCRmqLOfS05H1JYlea/tBommx3lAwfOz+9sQchHw=; b=ZLrVfcta+2U+HixHMdo6jNHGF0JvHSz06iL/6RUr4fLyXNCC4F4mHlem+7hguR/tAm H3+NB00VtEF0CprZ73wZOKsxsbIJnpt4DaECNxdVfFjsUqwtpY/+wKtv9oLMyYKIdHZG rQeI+X61Wv2NRwMkE3zhRQBrKoL5LcjO5IGgzG+r8eY1JKJVgCGn+/QZjCaiMb3GcjrT P1S+83QtJL8dt/KFga9J3MY+r70gorF3boHI+yFfpJ7O93lTQaM2gDDloYkhm6SznFyL AntlwuQBAleVUXeVbLOk+66LG8uBF0mBuxkM8flxtlimIkewIvOuM3stc08xbsNN3lH7 BpHg== X-Gm-Message-State: ALoCoQkKleGdM8PuqlgQCfgJ7OCu28hh4isLAiuh87oXDIGsH2kcOYNyim7h5zweJY9jGRiJaeuT/jKIPZixGbCe9MCV8SrdXZEoZSsvqsk2LWPQ36gAr6oaHo4yuqtmii29i/6ytFRqdbdp6axZ9chUGwEI6im2UqAlsopGuWx4j6qTNlz1LJ/WbgdftHscia+jDGKPIijn X-Received: by 10.236.91.107 with SMTP id g71mr1415849yhf.53.1396481124003; Wed, 02 Apr 2014 16:25:24 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id f65si640339yhg.7.2014.04.02.16.25.23 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 02 Apr 2014 16:25:24 -0700 (PDT) Received: from kaki.bld.corp.google.com (kaki.bld.corp.google.com [172.29.216.32]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id CA0A55A4226; Wed, 2 Apr 2014 16:25:23 -0700 (PDT) Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 725DD220B45; Wed, 2 Apr 2014 17:25:23 -0600 (MDT) From: Simon Glass To: =?UTF-8?q?=C5=81ukasz=20Majewski?= , U-Boot Mailing List Date: Wed, 2 Apr 2014 17:24:18 -0600 Message-Id: <1396481069-24950-2-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a In-Reply-To: <1396481069-24950-1-git-send-email-sjg@chromium.org> References: <1396481069-24950-1-git-send-email-sjg@chromium.org> Cc: Tom Rini , u-boot-review@google.com, Rajeshwari Shinde Subject: [U-Boot] [PATCH v2 01/12] exynos: Drop old smdk5250.c file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This is not used by any boards now. Drop it to avoid confusion. Signed-off-by: Simon Glass --- Changes in v2: - Add new patch to drop smdk5250.c file board/samsung/smdk5250/Makefile | 4 - board/samsung/smdk5250/exynos5-dt.c | 125 ++++++++++++ board/samsung/smdk5250/smdk5250.c | 368 ------------------------------------ 3 files changed, 125 insertions(+), 372 deletions(-) delete mode 100644 board/samsung/smdk5250/smdk5250.c diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile index 6a58655..3d96b07 100644 --- a/board/samsung/smdk5250/Makefile +++ b/board/samsung/smdk5250/Makefile @@ -7,9 +7,5 @@ obj-y += smdk5250_spl.o ifndef CONFIG_SPL_BUILD -ifdef CONFIG_OF_CONTROL obj-y += exynos5-dt.o -else -obj-y += smdk5250.o -endif endif diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c index 379a45c..1a64b9b 100644 --- a/board/samsung/smdk5250/exynos5-dt.c +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -44,6 +44,131 @@ int exynos_init(void) return 0; } +#if defined(CONFIG_POWER) +#ifdef CONFIG_POWER_MAX77686 +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + +static int max77686_init(void) +{ + struct pmic *p; + + if (pmic_init(I2C_PMIC)) + return -1; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; +} +#endif /* CONFIG_POWER_MAX77686 */ + +int exynos_power_init(void) +{ + int ret = 0; + +#ifdef CONFIG_POWER_MAX77686 + ret = max77686_init(); +#endif + return ret; +} +#endif /* CONFIG_POWER */ + #ifdef CONFIG_LCD void exynos_cfg_lcd_gpio(void) { diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c deleted file mode 100644 index 28a6d9e..0000000 --- a/board/samsung/smdk5250/smdk5250.c +++ /dev/null @@ -1,368 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SOUND_MAX98095 -static void board_enable_audio_codec(void) -{ - struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) - samsung_get_base_gpio_part1(); - - /* Enable MAX98095 Codec */ - s5p_gpio_direction_output(&gpio1->x1, 7, 1); - s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); -} -#endif - -int exynos_init(void) -{ -#ifdef CONFIG_SOUND_MAX98095 - board_enable_audio_codec(); -#endif - return 0; -} - -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_SMC911X - u32 smc_bw_conf, smc_bc_conf; - struct fdt_sromc config; - fdt_addr_t base_addr; - - /* Non-FDT configuration - bank number and timing parameters*/ - config.bank = CONFIG_ENV_SROM_BANK; - config.width = 2; - - config.timing[FDT_SROM_TACS] = 0x01; - config.timing[FDT_SROM_TCOS] = 0x01; - config.timing[FDT_SROM_TACC] = 0x06; - config.timing[FDT_SROM_TCOH] = 0x01; - config.timing[FDT_SROM_TAH] = 0x0C; - config.timing[FDT_SROM_TACP] = 0x09; - config.timing[FDT_SROM_PMC] = 0x01; - base_addr = CONFIG_SMC911X_BASE; - - /* Ethernet needs data bus width of 16 bits */ - if (config.width != 2) { - debug("%s: Unsupported bus width %d\n", __func__, - config.width); - return -1; - } - smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) - | SROMC_BYTE_ENABLE(config.bank); - - smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |\ - SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\ - SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\ - SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\ - SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |\ - SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\ - SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); - - /* Select and configure the SROMC bank */ - exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); - s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); - return smc911x_initialize(0, base_addr); -#endif - return 0; -} - -#ifdef CONFIG_DISPLAY_BOARDINFO -int checkboard(void) -{ - printf("\nBoard: SMDK5250\n"); - return 0; -} -#endif - -#ifdef CONFIG_GENERIC_MMC -int board_mmc_init(bd_t *bis) -{ - int err, ret = 0, index, bus_width; - u32 base; - - err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); - if (err) - debug("SDMMC0 not configured\n"); - ret |= err; - - /*EMMC: dwmmc Channel-0 with 8 bit bus width */ - index = 0; - base = samsung_get_base_mmc() + (0x10000 * index); - bus_width = 8; - err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); - if (err) - debug("dwmmc Channel-0 init failed\n"); - ret |= err; - - err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); - if (err) - debug("SDMMC2 not configured\n"); - ret |= err; - - /*SD: dwmmc Channel-2 with 4 bit bus width */ - index = 2; - base = samsung_get_base_mmc() + (0x10000 * index); - bus_width = 4; - err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); - if (err) - debug("dwmmc Channel-2 init failed\n"); - ret |= err; - - return ret; -} -#endif - -void board_i2c_init(const void *blob) -{ - int i; - - for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) { - exynos_pinmux_config((PERIPH_ID_I2C0 + i), - PINMUX_FLAG_NONE); - } -} - -#if defined(CONFIG_POWER) -#ifdef CONFIG_POWER_MAX77686 -static int pmic_reg_update(struct pmic *p, int reg, uint regval) -{ - u32 val; - int ret = 0; - - ret = pmic_reg_read(p, reg, &val); - if (ret) { - debug("%s: PMIC %d register read failed\n", __func__, reg); - return -1; - } - val |= regval; - ret = pmic_reg_write(p, reg, val); - if (ret) { - debug("%s: PMIC %d register write failed\n", __func__, reg); - return -1; - } - return 0; -} - -static int max77686_init(void) -{ - struct pmic *p; - - if (pmic_init(I2C_PMIC)) - return -1; - - p = pmic_get("MAX77686_PMIC"); - if (!p) - return -ENODEV; - - if (pmic_probe(p)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) - return -1; - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, - MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) - return -1; - - /* VDD_MIF */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, - MAX77686_BUCK1OUT_1V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK1OUT); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, - MAX77686_BUCK1CTRL_EN)) - return -1; - - /* VDD_ARM */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, - MAX77686_BUCK2DVS1_1_3V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK2DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, - MAX77686_BUCK2CTRL_ON)) - return -1; - - /* VDD_INT */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, - MAX77686_BUCK3DVS1_1_0125V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK3DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_G3D */ - if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, - MAX77686_BUCK4DVS1_1_2V)) { - debug("%s: PMIC %d register write failed\n", __func__, - MAX77686_REG_PMIC_BUCK4DVS1); - return -1; - } - - if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, - MAX77686_BUCK3CTRL_ON)) - return -1; - - /* VDD_LDO2 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, - MAX77686_LD02CTRL1_1_5V | EN_LDO)) - return -1; - - /* VDD_LDO3 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, - MAX77686_LD03CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO5 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, - MAX77686_LD05CTRL1_1_8V | EN_LDO)) - return -1; - - /* VDD_LDO10 */ - if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, - MAX77686_LD10CTRL1_1_8V | EN_LDO)) - return -1; - - return 0; -} -#endif /* CONFIG_POWER_MAX77686 */ - -int exynos_power_init(void) -{ - int ret = 0; - -#ifdef CONFIG_POWER_MAX77686 - ret = max77686_init(); -#endif - return ret; -} -#endif /* CONFIG_POWER */ - -#ifdef CONFIG_LCD -void exynos_cfg_lcd_gpio(void) -{ - struct exynos5_gpio_part1 *gpio1 = - (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); - - /* For Backlight */ - s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->b2, 0, 1); - - /* LCD power on */ - s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->x1, 5, 1); - - /* Set Hotplug detect for DP */ - s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); -} - -void exynos_set_dp_phy(unsigned int onoff) -{ - set_dp_phy_ctrl(onoff); -} - -vidinfo_t panel_info = { - .vl_freq = 60, - .vl_col = 2560, - .vl_row = 1600, - .vl_width = 2560, - .vl_height = 1600, - .vl_clkp = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_LOW, - .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */ - - /* wDP panel timing infomation */ - .vl_hspw = 32, - .vl_hbpd = 80, - .vl_hfpd = 48, - - .vl_vspw = 6, - .vl_vbpd = 37, - .vl_vfpd = 3, - .vl_cmd_allow_len = 0xf, - - .win_id = 3, - .dual_lcd_enabled = 0, - - .init_delay = 0, - .power_on_delay = 0, - .reset_delay = 0, - .interface_mode = FIMD_RGB_INTERFACE, - .dp_enabled = 1, -}; - -static struct edp_device_info edp_info = { - .disp_info = { - .h_res = 2560, - .h_sync_width = 32, - .h_back_porch = 80, - .h_front_porch = 48, - .v_res = 1600, - .v_sync_width = 6, - .v_back_porch = 37, - .v_front_porch = 3, - .v_sync_rate = 60, - }, - .lt_info = { - .lt_status = DP_LT_NONE, - }, - .video_info = { - .master_mode = 0, - .bist_mode = DP_DISABLE, - .bist_pattern = NO_PATTERN, - .h_sync_polarity = 0, - .v_sync_polarity = 0, - .interlaced = 0, - .color_space = COLOR_RGB, - .dynamic_range = VESA, - .ycbcr_coeff = COLOR_YCBCR601, - .color_depth = COLOR_8, - }, -}; - -static struct exynos_dp_platform_data dp_platform_data = { - .edp_dev_info = &edp_info, -}; - -void init_panel_info(vidinfo_t *vid) -{ - vid->rgb_mode = MODE_RGB_P; - exynos_set_dp_platform_data(&dp_platform_data); -} -#endif