| Message ID | 1392820069-7202-1-git-send-email-phdm@macqel.be |
|---|---|
| State | Not Applicable |
| Delegated to: | Stefano Babic |
| Headers | show |
On 2/19/2014 7:27 AM, Philippe De Muyter wrote: > On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5 > Mhz), because of wrong assumptions about the reference clock and the > way the divider is used. > > I have fixed that for all MX6's by using the IPG clock as the reference > clock, and applying the - 1 correction when we have a ENET MAC instead > of a FEC MAC, just like what is done in the fec linux driver. > > Signed-off-by: Philippe De Muyter <phdm@macqel.be> > --- > drivers/net/fec_mxc.c | 20 +++++++++++++++++--- > 1 files changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index 3b2b995..3ab0ecd 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, > > static void fec_mii_setspeed(struct ethernet_regs *eth) > { > + u32 sysclock; > + u32 mii_speed; > + > /* > * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock > * and do not drop the Preamble. > + * shift the result by 1, because MII_SPEED field is at bits 6..1. > */ > - writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1, > - ð->mii_speed); > - debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); > +#if defined(CONFIG_MX6) > + sysclock = mxc_get_clock(MXC_IPG_CLK); > +#else > + sysclock = imx_get_fecclk(); > +#endif Why not fix it in arch/arm/cpu/armv7/mx6/clock.c ? u32 imx_get_fecclk(void) { - return decode_pll(PLL_ENET, MXC_HCLK); + mxc_get_clock(MXC_IPG_CLK); } > +#define MIIM_SPEED 2500000 > + mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2)); > +#ifdef FEC_QUIRK_ENET_MAC > + mii_speed -= 1; > +#endif > + writel(mii_speed << 1, ð->mii_speed); > + debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock, > + readl(ð->mii_speed)); > } > > static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, >
On Wed, Feb 19, 2014 at 12:19:04PM -0700, Troy Kisky wrote: > On 2/19/2014 7:27 AM, Philippe De Muyter wrote: > > On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5 > > Mhz), because of wrong assumptions about the reference clock and the > > way the divider is used. > > > > I have fixed that for all MX6's by using the IPG clock as the reference > > clock, and applying the - 1 correction when we have a ENET MAC instead > > of a FEC MAC, just like what is done in the fec linux driver. > > > > Signed-off-by: Philippe De Muyter <phdm@macqel.be> > > --- > > drivers/net/fec_mxc.c | 20 +++++++++++++++++--- > > 1 files changed, 17 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > > index 3b2b995..3ab0ecd 100644 > > --- a/drivers/net/fec_mxc.c > > +++ b/drivers/net/fec_mxc.c > > @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, > > > > static void fec_mii_setspeed(struct ethernet_regs *eth) > > { > > + u32 sysclock; > > + u32 mii_speed; > > + > > /* > > * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock > > * and do not drop the Preamble. > > + * shift the result by 1, because MII_SPEED field is at bits 6..1. > > */ > > - writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1, > > - ð->mii_speed); > > - debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); > > +#if defined(CONFIG_MX6) > > + sysclock = mxc_get_clock(MXC_IPG_CLK); > > +#else > > + sysclock = imx_get_fecclk(); > > +#endif > > > Why not fix it in arch/arm/cpu/armv7/mx6/clock.c ? > > u32 imx_get_fecclk(void) > { > - return decode_pll(PLL_ENET, MXC_HCLK); > + mxc_get_clock(MXC_IPG_CLK); > } Yeah. I had not thought about it. Thanks. Actually, one could also call directly get_ipg_clk(). > > > +#define MIIM_SPEED 2500000 > > + mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2)); > > +#ifdef FEC_QUIRK_ENET_MAC > > + mii_speed -= 1; > > +#endif > > + writel(mii_speed << 1, ð->mii_speed); > > + debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock, > > + readl(ð->mii_speed)); > > } > > > > static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, > >
Hello Phillip, Am 19.02.2014 15:27, wrote Philippe De Muyter: > On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5 > Mhz), because of wrong assumptions about the reference clock and the > way the divider is used. > > I have fixed that for all MX6's by using the IPG clock as the reference > clock, and applying the - 1 correction when we have a ENET MAC instead > of a FEC MAC, just like what is done in the fec linux driver. this should be fixed with ARM: imx6: fix wrong fec clk NET: fec_mxc: fix MDIO clock prescaler calculation and was pulled yesterday to u-boot-arm/master > > Signed-off-by: Philippe De Muyter <phdm@macqel.be> > --- > drivers/net/fec_mxc.c | 20 +++++++++++++++++--- > 1 files changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index 3b2b995..3ab0ecd 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, > > static void fec_mii_setspeed(struct ethernet_regs *eth) > { > + u32 sysclock; > + u32 mii_speed; > + > /* > * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock > * and do not drop the Preamble. > + * shift the result by 1, because MII_SPEED field is at bits 6..1. > */ > - writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1, > - ð->mii_speed); > - debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); > +#if defined(CONFIG_MX6) > + sysclock = mxc_get_clock(MXC_IPG_CLK); > +#else > + sysclock = imx_get_fecclk(); > +#endif > +#define MIIM_SPEED 2500000 > + mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2)); > +#ifdef FEC_QUIRK_ENET_MAC > + mii_speed -= 1; > +#endif > + writel(mii_speed << 1, ð->mii_speed); > + debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock, > + readl(ð->mii_speed)); > } > > static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, >
Hi Markus, On Thu, Feb 20, 2014 at 08:40:03AM +0100, Markus Niebel wrote: > Hello Phillip, > > Am 19.02.2014 15:27, wrote Philippe De Muyter: > > On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5 > > Mhz), because of wrong assumptions about the reference clock and the > > way the divider is used. > > > > I have fixed that for all MX6's by using the IPG clock as the reference > > clock, and applying the - 1 correction when we have a ENET MAC instead > > of a FEC MAC, just like what is done in the fec linux driver. > > this should be fixed with > > ARM: imx6: fix wrong fec clk > NET: fec_mxc: fix MDIO clock prescaler calculation > > and was pulled yesterday to > > u-boot-arm/master I am working with plain u-boot (git://git.denx.de/u-boot.git), and of course those patches were not yet there yesterday :) Thanks Philippe > > > > > Signed-off-by: Philippe De Muyter <phdm@macqel.be> > > --- > > drivers/net/fec_mxc.c | 20 +++++++++++++++++--- > > 1 files changed, 17 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > > index 3b2b995..3ab0ecd 100644 > > --- a/drivers/net/fec_mxc.c > > +++ b/drivers/net/fec_mxc.c > > @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, > > > > static void fec_mii_setspeed(struct ethernet_regs *eth) > > { > > + u32 sysclock; > > + u32 mii_speed; > > + > > /* > > * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock > > * and do not drop the Preamble. > > + * shift the result by 1, because MII_SPEED field is at bits 6..1. > > */ > > - writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1, > > - ð->mii_speed); > > - debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); > > +#if defined(CONFIG_MX6) > > + sysclock = mxc_get_clock(MXC_IPG_CLK); > > +#else > > + sysclock = imx_get_fecclk(); > > +#endif > > +#define MIIM_SPEED 2500000 > > + mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2)); > > +#ifdef FEC_QUIRK_ENET_MAC > > + mii_speed -= 1; > > +#endif > > + writel(mii_speed << 1, ð->mii_speed); > > + debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock, > > + readl(ð->mii_speed)); > > } > > > > static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, > >
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 3b2b995..3ab0ecd 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -124,13 +124,27 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, static void fec_mii_setspeed(struct ethernet_regs *eth) { + u32 sysclock; + u32 mii_speed; + /* * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock * and do not drop the Preamble. + * shift the result by 1, because MII_SPEED field is at bits 6..1. */ - writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1, - ð->mii_speed); - debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); +#if defined(CONFIG_MX6) + sysclock = mxc_get_clock(MXC_IPG_CLK); +#else + sysclock = imx_get_fecclk(); +#endif +#define MIIM_SPEED 2500000 + mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2)); +#ifdef FEC_QUIRK_ENET_MAC + mii_speed -= 1; +#endif + writel(mii_speed << 1, ð->mii_speed); + debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock, + readl(ð->mii_speed)); } static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr,
On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5 Mhz), because of wrong assumptions about the reference clock and the way the divider is used. I have fixed that for all MX6's by using the IPG clock as the reference clock, and applying the - 1 correction when we have a ENET MAC instead of a FEC MAC, just like what is done in the fec linux driver. Signed-off-by: Philippe De Muyter <phdm@macqel.be> --- drivers/net/fec_mxc.c | 20 +++++++++++++++++--- 1 files changed, 17 insertions(+), 3 deletions(-)