| Message ID | 1387405415-4519-1-git-send-email-clsee@altera.com |
|---|---|
| State | Not Applicable |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
Hi guys, Wonder any comments for this patch? Thanks Chin Liang On Wed, 2013-12-18 at 16:23 -0600, Chin Liang See wrote: > To add the DesignWare watchdog driver support. It required > information such as register base address and clock info from > configuration header file within include/configs folder. > > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Anatolij Gustschin <agust@denx.de> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > Cc: Heiko Schocher <hs@denx.de> > Cc: Tom Rini <trini@ti.com> > --- > drivers/watchdog/Makefile | 1 + > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 76 insertions(+) > create mode 100644 drivers/watchdog/designware_wdt.c > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile > index 06ced10..0276a10 100644 > --- a/drivers/watchdog/Makefile > +++ b/drivers/watchdog/Makefile > @@ -15,3 +15,4 @@ obj-$(CONFIG_S5P) += s5p_wdt.o > obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o > obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o > obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o > +obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o > diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c > new file mode 100644 > index 0000000..c3b14f5 > --- /dev/null > +++ b/drivers/watchdog/designware_wdt.c > @@ -0,0 +1,75 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <common.h> > +#include <watchdog.h> > +#include <asm/io.h> > +#include <asm/utils.h> > + > +#define DW_WDT_CR 0x00 > +#define DW_WDT_TORR 0x04 > +#define DW_WDT_CRR 0x0C > + > +#define DW_WDT_CR_EN_OFFSET 0x00 > +#define DW_WDT_CR_RMOD_OFFSET 0x01 > +#define DW_WDT_CR_RMOD_VAL 0x00 > +#define DW_WDT_CRR_RESTART_VAL 0x76 > + > +/* > + * Set the watchdog time interval. > + * Counter is 32 bit. > + */ > +int designware_wdt_settimeout(unsigned int timeout) > +{ > + signed int i; > + /* calculate the timeout range value */ > + i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ))\ > + - 16; > + if (i > 15) > + i = 15; > + if (i < 0) > + i = 0; > + > + writel((i | (i<<4)), > + (CONFIG_DW_WDT_BASE + DW_WDT_TORR)); > + return 0; > +} > + > +void designware_wdt_enable(void) > +{ > + writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) | \ > + (0x1 << DW_WDT_CR_EN_OFFSET)), > + (CONFIG_DW_WDT_BASE + DW_WDT_CR)); > +} > + > +unsigned int designware_wdt_is_enabled(void) > +{ > + unsigned long val; > + val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR)); > + return val & 0x1; > +} > + > +#if defined(CONFIG_HW_WATCHDOG) > +void hw_watchdog_reset(void) > +{ > + if (designware_wdt_is_enabled()) > + /* restart the watchdog counter */ > + writel(DW_WDT_CRR_RESTART_VAL, > + (CONFIG_DW_WDT_BASE + DW_WDT_CRR)); > +} > + > +void hw_watchdog_init(void) > +{ > + /* reset to disable the watchdog */ > + hw_watchdog_reset(); > + /* set timer in miliseconds */ > + designware_wdt_settimeout(CONFIG_HW_WATCHDOG_TIMEOUT_MS); > + /* enable the watchdog */ > + designware_wdt_enable(); > + /* reset the watchdog */ > + hw_watchdog_reset(); > +} > +#endif
Hi Albert, As there are no further comments, would need your help to apply this patch. Thanks and appreciate for your support. Chin Liang On Wed, 2013-12-18 at 16:23 -0600, Chin Liang See wrote: > To add the DesignWare watchdog driver support. It required > information such as register base address and clock info from > configuration header file within include/configs folder. > > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Anatolij Gustschin <agust@denx.de> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > Cc: Heiko Schocher <hs@denx.de> > Cc: Tom Rini <trini@ti.com> > --- > drivers/watchdog/Makefile | 1 + > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 76 insertions(+) > create mode 100644 drivers/watchdog/designware_wdt.c > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile > index 06ced10..0276a10 100644 > --- a/drivers/watchdog/Makefile > +++ b/drivers/watchdog/Makefile > @@ -15,3 +15,4 @@ obj-$(CONFIG_S5P) += s5p_wdt.o > obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o > obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o > obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o > +obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o > diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c > new file mode 100644 > index 0000000..c3b14f5 > --- /dev/null > +++ b/drivers/watchdog/designware_wdt.c > @@ -0,0 +1,75 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <common.h> > +#include <watchdog.h> > +#include <asm/io.h> > +#include <asm/utils.h> > + > +#define DW_WDT_CR 0x00 > +#define DW_WDT_TORR 0x04 > +#define DW_WDT_CRR 0x0C > + > +#define DW_WDT_CR_EN_OFFSET 0x00 > +#define DW_WDT_CR_RMOD_OFFSET 0x01 > +#define DW_WDT_CR_RMOD_VAL 0x00 > +#define DW_WDT_CRR_RESTART_VAL 0x76 > + > +/* > + * Set the watchdog time interval. > + * Counter is 32 bit. > + */ > +int designware_wdt_settimeout(unsigned int timeout) > +{ > + signed int i; > + /* calculate the timeout range value */ > + i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ))\ > + - 16; > + if (i > 15) > + i = 15; > + if (i < 0) > + i = 0; > + > + writel((i | (i<<4)), > + (CONFIG_DW_WDT_BASE + DW_WDT_TORR)); > + return 0; > +} > + > +void designware_wdt_enable(void) > +{ > + writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) | \ > + (0x1 << DW_WDT_CR_EN_OFFSET)), > + (CONFIG_DW_WDT_BASE + DW_WDT_CR)); > +} > + > +unsigned int designware_wdt_is_enabled(void) > +{ > + unsigned long val; > + val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR)); > + return val & 0x1; > +} > + > +#if defined(CONFIG_HW_WATCHDOG) > +void hw_watchdog_reset(void) > +{ > + if (designware_wdt_is_enabled()) > + /* restart the watchdog counter */ > + writel(DW_WDT_CRR_RESTART_VAL, > + (CONFIG_DW_WDT_BASE + DW_WDT_CRR)); > +} > + > +void hw_watchdog_init(void) > +{ > + /* reset to disable the watchdog */ > + hw_watchdog_reset(); > + /* set timer in miliseconds */ > + designware_wdt_settimeout(CONFIG_HW_WATCHDOG_TIMEOUT_MS); > + /* enable the watchdog */ > + designware_wdt_enable(); > + /* reset the watchdog */ > + hw_watchdog_reset(); > +} > +#endif
Hi Chin, On Wed, 18 Dec 2013 16:23:35 -0600, Chin Liang See <clsee@altera.com> wrote: > To add the DesignWare watchdog driver support. It required > information such as register base address and clock info from > configuration header file within include/configs folder. > > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Anatolij Gustschin <agust@denx.de> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > Cc: Heiko Schocher <hs@denx.de> > Cc: Tom Rini <trini@ti.com> > --- > drivers/watchdog/Makefile | 1 + > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 76 insertions(+) > create mode 100644 drivers/watchdog/designware_wdt.c As such, this code is dead code in that no board uses this watchdog -- same as the NAND driver series assigned to scott Wood (cc:). If there is a board which uses these drivers, please resubmit the drivers and board patches in a single series where some board config is made to use them. Amicalement,
Hi Albert, On Thu, 2014-02-13 at 10:35 +0100, ZY - albert.u.boot wrote: > Hi Chin, > > On Wed, 18 Dec 2013 16:23:35 -0600, Chin Liang See <clsee@altera.com> > wrote: > > > To add the DesignWare watchdog driver support. It required > > information such as register base address and clock info from > > configuration header file within include/configs folder. > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > Cc: Anatolij Gustschin <agust@denx.de> > > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > > Cc: Heiko Schocher <hs@denx.de> > > Cc: Tom Rini <trini@ti.com> > > --- > > drivers/watchdog/Makefile | 1 + > > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > > 2 files changed, 76 insertions(+) > > create mode 100644 drivers/watchdog/designware_wdt.c > > As such, this code is dead code in that no board uses this watchdog -- > same as the NAND driver series assigned to scott Wood (cc:). > > If there is a board which uses these drivers, please resubmit the > drivers and board patches in a single series where some board config > is made to use them. > > Amicalement, Sorry my bad as I would thought they would need 2 different patches. Let me fix this watchdog and nand patch. Thanks Chin Liang
Hi Chin, On Fri, 21 Feb 2014 10:00:08 -0600, Chin Liang See <clsee@altera.com> wrote: > Hi Albert, > > On Thu, 2014-02-13 at 10:35 +0100, ZY - albert.u.boot wrote: > > Hi Chin, > > > > On Wed, 18 Dec 2013 16:23:35 -0600, Chin Liang See <clsee@altera.com> > > wrote: > > > > > To add the DesignWare watchdog driver support. It required > > > information such as register base address and clock info from > > > configuration header file within include/configs folder. > > > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > > Cc: Anatolij Gustschin <agust@denx.de> > > > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > > > Cc: Heiko Schocher <hs@denx.de> > > > Cc: Tom Rini <trini@ti.com> > > > --- > > > drivers/watchdog/Makefile | 1 + > > > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > > > 2 files changed, 76 insertions(+) > > > create mode 100644 drivers/watchdog/designware_wdt.c > > > > As such, this code is dead code in that no board uses this watchdog -- > > same as the NAND driver series assigned to scott Wood (cc:). > > > > If there is a board which uses these drivers, please resubmit the > > drivers and board patches in a single series where some board config > > is made to use them. > > > > Amicalement, > > Sorry my bad as I would thought they would need 2 different patches. Actually it could have been two different patches, but in a single series (i.e., patch 1/2 provides the driver, patch 2/2 provides the configurations which use the driver). > Chin Liang Amicalement,
Hi Albert, On Fri, 2014-02-21 at 17:58 +0100, ZY - albert.u.boot wrote: > Hi Chin, > > On Fri, 21 Feb 2014 10:00:08 -0600, Chin Liang See <clsee@altera.com> > wrote: > > > Hi Albert, > > > > On Thu, 2014-02-13 at 10:35 +0100, ZY - albert.u.boot wrote: > > > Hi Chin, > > > > > > On Wed, 18 Dec 2013 16:23:35 -0600, Chin Liang See <clsee@altera.com> > > > wrote: > > > > > > > To add the DesignWare watchdog driver support. It required > > > > information such as register base address and clock info from > > > > configuration header file within include/configs folder. > > > > > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > > > Cc: Anatolij Gustschin <agust@denx.de> > > > > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > > > > Cc: Heiko Schocher <hs@denx.de> > > > > Cc: Tom Rini <trini@ti.com> > > > > --- > > > > drivers/watchdog/Makefile | 1 + > > > > drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ > > > > 2 files changed, 76 insertions(+) > > > > create mode 100644 drivers/watchdog/designware_wdt.c > > > > > > As such, this code is dead code in that no board uses this watchdog -- > > > same as the NAND driver series assigned to scott Wood (cc:). > > > > > > If there is a board which uses these drivers, please resubmit the > > > drivers and board patches in a single series where some board config > > > is made to use them. > > > > > > Amicalement, > > > > Sorry my bad as I would thought they would need 2 different patches. > > Actually it could have been two different patches, but in a single > series (i.e., patch 1/2 provides the driver, patch 2/2 provides the > configurations which use the driver). > Sure I can do that too. Thanks! Chin Liang > > Chin Liang > > Amicalement,
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 06ced10..0276a10 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -15,3 +15,4 @@ obj-$(CONFIG_S5P) += s5p_wdt.o obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o +obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c new file mode 100644 index 0000000..c3b14f5 --- /dev/null +++ b/drivers/watchdog/designware_wdt.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <watchdog.h> +#include <asm/io.h> +#include <asm/utils.h> + +#define DW_WDT_CR 0x00 +#define DW_WDT_TORR 0x04 +#define DW_WDT_CRR 0x0C + +#define DW_WDT_CR_EN_OFFSET 0x00 +#define DW_WDT_CR_RMOD_OFFSET 0x01 +#define DW_WDT_CR_RMOD_VAL 0x00 +#define DW_WDT_CRR_RESTART_VAL 0x76 + +/* + * Set the watchdog time interval. + * Counter is 32 bit. + */ +int designware_wdt_settimeout(unsigned int timeout) +{ + signed int i; + /* calculate the timeout range value */ + i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ))\ + - 16; + if (i > 15) + i = 15; + if (i < 0) + i = 0; + + writel((i | (i<<4)), + (CONFIG_DW_WDT_BASE + DW_WDT_TORR)); + return 0; +} + +void designware_wdt_enable(void) +{ + writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) | \ + (0x1 << DW_WDT_CR_EN_OFFSET)), + (CONFIG_DW_WDT_BASE + DW_WDT_CR)); +} + +unsigned int designware_wdt_is_enabled(void) +{ + unsigned long val; + val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR)); + return val & 0x1; +} + +#if defined(CONFIG_HW_WATCHDOG) +void hw_watchdog_reset(void) +{ + if (designware_wdt_is_enabled()) + /* restart the watchdog counter */ + writel(DW_WDT_CRR_RESTART_VAL, + (CONFIG_DW_WDT_BASE + DW_WDT_CRR)); +} + +void hw_watchdog_init(void) +{ + /* reset to disable the watchdog */ + hw_watchdog_reset(); + /* set timer in miliseconds */ + designware_wdt_settimeout(CONFIG_HW_WATCHDOG_TIMEOUT_MS); + /* enable the watchdog */ + designware_wdt_enable(); + /* reset the watchdog */ + hw_watchdog_reset(); +} +#endif
To add the DesignWare watchdog driver support. It required information such as register base address and clock info from configuration header file within include/configs folder. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> --- drivers/watchdog/Makefile | 1 + drivers/watchdog/designware_wdt.c | 75 +++++++++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 drivers/watchdog/designware_wdt.c