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[U-Boot] powerpc/mpc85xx: Update CONFIG_SYS_FSL_TBCLK_DIV for T1040

Message ID 1386746353-8099-1-git-send-email-prabhakar@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Prabhakar Kushwaha Dec. 11, 2013, 7:19 a.m. UTC
The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16.

So, update its value as default.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 arch/powerpc/include/asm/config_mpc85xx.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

York Sun Dec. 11, 2013, 7:18 p.m. UTC | #1
On 12/10/2013 11:19 PM, Prabhakar Kushwaha wrote:
> The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16.
> 
> So, update its value as default.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> ---

Applied to u-boot-mpc85xx/master. Thanks.

York
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 99e16bd..244ccbf 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -711,7 +711,7 @@  defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define CONFIG_FM_PLAT_CLK_DIV	1
 #define CONFIG_SYS_FM1_CLK		CONFIG_FM_PLAT_CLK_DIV
 #define CONFIG_SYS_FM_MURAM_SIZE	0x30000
-#define CONFIG_SYS_FSL_TBCLK_DIV	32
+#define CONFIG_SYS_FSL_TBCLK_DIV	16
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE