From patchwork Mon Dec 9 18:08:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 299146 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3F4F12C0096 for ; Tue, 10 Dec 2013 05:09:46 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 966DAA76BB; Mon, 9 Dec 2013 19:09:41 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dZNo1Y-zCu6n; Mon, 9 Dec 2013 19:09:41 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 83D66A772C; Mon, 9 Dec 2013 19:08:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 11D00A77EE for ; Mon, 9 Dec 2013 19:08:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 40jjmD+Ha85J for ; Mon, 9 Dec 2013 19:08:48 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qe0-f46.google.com (mail-qe0-f46.google.com [209.85.128.46]) by theia.denx.de (Postfix) with ESMTPS id A252AA760D for ; Mon, 9 Dec 2013 19:08:34 +0100 (CET) Received: by mail-qe0-f46.google.com with SMTP id a11so3042998qen.19 for ; Mon, 09 Dec 2013 10:08:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=N1rcc+vsaxmHmZdHiM8vtAB/s0JK432HCLvTUwO0TlU=; b=0//Sx5dYfsYqU1mgLW5z4YHlTfO4W3wugifkJQMHfgfabk7EzArrkaPERDRAHDTvXX JVJovsoIlJfmSjrPN8L+IPt5nsbda5TF9JYP9Fvz39OaPElg4o40AfGrxxpy8XXJLd+W yFJwKC5K1sq5lh+tHTm+VKq7Py+rec8LS9yEzP1uiMpxEvh6L1QZQUwUR+xR0UDqkuTd R8VgoE7ppAVvL6iu/wq7nlLL1G70KqlGHzfNE2joykSHqZFGvkz2UDeNWuQUoIqcWPtL uJGDREzewET+h3efRQtGYiXp0ChOK7nQ+Y1bfKL6kFFoEjIotbaeY0YHD0G+kjYzTHMy tNAA== X-Received: by 10.224.67.200 with SMTP id s8mr187525819qai.75.1386612514030; Mon, 09 Dec 2013 10:08:34 -0800 (PST) Received: from localhost.localdomain (cpe-174-106-216-211.ec.res.rr.com. [174.106.216.211]) by mx.google.com with ESMTPSA id hb2sm32083216qeb.6.2013.12.09.10.08.32 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 09 Dec 2013 10:08:33 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Date: Mon, 9 Dec 2013 13:08:51 -0500 Message-Id: <1386612538-11186-6-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1386612538-11186-1-git-send-email-trini@ti.com> References: <1386612538-11186-1-git-send-email-trini@ti.com> Subject: [U-Boot] [PATCH v2 05/12] mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driver. Acked-by: Scott Wood Signed-off-by: Tom Rini --- Changes in v2: - Document CONFIG_SPL_MTD_SUPPORT in the README --- README | 4 +++ drivers/mtd/nand/am335x_spl_bch.c | 54 ++++++++++++++++++------------------- include/configs/ti_armv7_common.h | 1 + spl/Makefile | 1 + 4 files changed, 33 insertions(+), 27 deletions(-) diff --git a/README b/README index 265e81e..1b5a598 100644 --- a/README +++ b/README @@ -3229,6 +3229,10 @@ FIT uImage format: Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface. + CONFIG_SPL_MTD_SUPPORT + Support for the MTD subsystem within SPL. Useful for + environment on NAND support within SPL. + CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT Set for the SPL on PPC mpc8xxx targets, support for drivers/ddr/fsl/libddr.o in SPL binary. diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c index c84851b..bd89b06 100644 --- a/drivers/mtd/nand/am335x_spl_bch.c +++ b/drivers/mtd/nand/am335x_spl_bch.c @@ -16,7 +16,7 @@ #include static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; -static nand_info_t mtd; +nand_info_t nand_info[1]; static struct nand_chip nand_chip; #define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ @@ -30,12 +30,12 @@ static struct nand_chip nand_chip; static int nand_command(int block, int page, uint32_t offs, u8 cmd) { - struct nand_chip *this = mtd.priv; + struct nand_chip *this = nand_info[0].priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; void (*hwctrl)(struct mtd_info *mtd, int cmd, unsigned int ctrl) = this->cmd_ctrl; - while (!this->dev_ready(&mtd)) + while (!this->dev_ready(&nand_info[0])) ; /* Emulate NAND_CMD_READOOB */ @@ -45,11 +45,11 @@ static int nand_command(int block, int page, uint32_t offs, } /* Begin command latch cycle */ - hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + hwctrl(&nand_info[0], cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); if (cmd == NAND_CMD_RESET) { - hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); - while (!this->dev_ready(&mtd)) + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + while (!this->dev_ready(&nand_info[0])) ; return 0; } @@ -60,35 +60,35 @@ static int nand_command(int block, int page, uint32_t offs, /* Set ALE and clear CLE to start address cycle */ /* Column address */ - hwctrl(&mtd, offs & 0xff, + hwctrl(&nand_info[0], offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ + hwctrl(&nand_info[0], (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - hwctrl(&mtd, ((page_addr >> 8) & 0xff), + hwctrl(&nand_info[0], (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE /* One more address cycle for devices > 128MiB */ - hwctrl(&mtd, (page_addr >> 16) & 0x0f, + hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif - hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); if (cmd == NAND_CMD_READ0) { /* Latch in address */ - hwctrl(&mtd, NAND_CMD_READSTART, + hwctrl(&nand_info[0], NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * Wait a while for the data to be ready */ - while (!this->dev_ready(&mtd)) + while (!this->dev_ready(&nand_info[0])) ; } else if (cmd == NAND_CMD_RNDOUT) { - hwctrl(&mtd, NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE | + hwctrl(&nand_info[0], NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); } return 0; @@ -96,7 +96,7 @@ static int nand_command(int block, int page, uint32_t offs, static int nand_is_bad_block(int block) { - struct nand_chip *this = mtd.priv; + struct nand_chip *this = nand_info[0].priv; nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); @@ -117,7 +117,7 @@ static int nand_is_bad_block(int block) static int nand_read_page(int block, int page, void *dst) { - struct nand_chip *this = mtd.priv; + struct nand_chip *this = nand_info[0].priv; u_char ecc_calc[ECCTOTAL]; u_char ecc_code[ECCTOTAL]; u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; @@ -133,15 +133,15 @@ static int nand_read_page(int block, int page, void *dst) nand_command(block, page, 0, NAND_CMD_READ0); for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - this->ecc.hwctl(&mtd, NAND_ECC_READ); + this->ecc.hwctl(&nand_info[0], NAND_ECC_READ); nand_command(block, page, data_pos, NAND_CMD_RNDOUT); - this->read_buf(&mtd, p, eccsize); + this->read_buf(&nand_info[0], p, eccsize); nand_command(block, page, oob_pos, NAND_CMD_RNDOUT); - this->read_buf(&mtd, oob, eccbytes); - this->ecc.calculate(&mtd, p, &ecc_calc[i]); + this->read_buf(&nand_info[0], oob, eccbytes); + this->ecc.calculate(&nand_info[0], p, &ecc_calc[i]); data_pos += eccsize; oob_pos += eccbytes; @@ -160,7 +160,7 @@ static int nand_read_page(int block, int page, void *dst) * from correct_data(). We just hope that all possible errors * are corrected by this routine. */ - this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]); + this->ecc.correct(&nand_info[0], p, &ecc_code[i], &ecc_calc[i]); } return 0; @@ -206,13 +206,13 @@ void nand_init(void) /* * Init board specific nand support */ - mtd.priv = &nand_chip; + nand_info[0].priv = &nand_chip; nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; board_nand_init(&nand_chip); if (nand_chip.select_chip) - nand_chip.select_chip(&mtd, 0); + nand_chip.select_chip(&nand_info[0], 0); /* NAND chip may require reset after power-on */ nand_command(0, 0, 0, NAND_CMD_RESET); @@ -222,5 +222,5 @@ void nand_init(void) void nand_deselect(void) { if (nand_chip.select_chip) - nand_chip.select_chip(&mtd, -1); + nand_chip.select_chip(&nand_info[0], -1); } diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 4d09ad9..c3ca5a5 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -245,6 +245,7 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #endif diff --git a/spl/Makefile b/spl/Makefile index 2a787af..97a4905 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -79,6 +79,7 @@ LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/ LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ \ drivers/power/pmic/ LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/ +LIBS-$(CONFIG_SPL_MTD_SUPPORT) += drivers/mtd/ LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/ LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/ LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/