From patchwork Fri Nov 8 02:06:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Haijun.Zhang" X-Patchwork-Id: 289668 X-Patchwork-Delegate: panto@antoniou-consulting.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9BF472C00A9 for ; Fri, 8 Nov 2013 13:53:47 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AFEED4A3D0; Fri, 8 Nov 2013 03:53:34 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BXzjJ1zlPJZa; Fri, 8 Nov 2013 03:53:34 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 720784A3ED; Fri, 8 Nov 2013 03:53:09 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D2EB84A3BF for ; Fri, 8 Nov 2013 03:51:28 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id y5YK2j2YlK3d for ; Fri, 8 Nov 2013 03:51:24 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from db8outboundpool.messaging.microsoft.com (mail-db8lp0184.outbound.messaging.microsoft.com [213.199.154.184]) by theia.denx.de (Postfix) with ESMTPS id 36E514A3C0 for ; Fri, 8 Nov 2013 03:51:14 +0100 (CET) Received: from mail5-db8-R.bigfish.com (10.174.8.244) by DB8EHSOBE012.bigfish.com (10.174.4.75) with Microsoft SMTP Server id 14.1.225.22; Fri, 8 Nov 2013 02:51:13 +0000 Received: from mail5-db8 (localhost [127.0.0.1]) by mail5-db8-R.bigfish.com (Postfix) with ESMTP id D089FC00247; Fri, 8 Nov 2013 02:51:13 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h1155h) Received: from mail5-db8 (localhost.localdomain [127.0.0.1]) by mail5-db8 (MessageSwitch) id 1383879072590764_2115; Fri, 8 Nov 2013 02:51:12 +0000 (UTC) Received: from DB8EHSMHS013.bigfish.com (unknown [10.174.8.231]) by mail5-db8.bigfish.com (Postfix) with ESMTP id 8ACA8280040; Fri, 8 Nov 2013 02:51:12 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB8EHSMHS013.bigfish.com (10.174.4.23) with Microsoft SMTP Server (TLS) id 14.16.227.3; Fri, 8 Nov 2013 02:51:12 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.3.158.2; Fri, 8 Nov 2013 02:51:10 +0000 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id rA82osJt031858; Thu, 7 Nov 2013 19:51:07 -0700 From: Haijun Zhang To: , , Date: Fri, 8 Nov 2013 10:06:58 +0800 Message-ID: <1383876423-2265-3-git-send-email-Haijun.Zhang@freescale.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1383876423-2265-1-git-send-email-Haijun.Zhang@freescale.com> References: <1383876423-2265-1-git-send-email-Haijun.Zhang@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-Mailman-Approved-At: Fri, 08 Nov 2013 03:53:06 +0100 Cc: Haijun Zhang , Haijun Zhang , trini@ti.com, X.Xie@freescale.com, scottwood@freescale.com Subject: [U-Boot] [PATCH 2/7 V2] mmc: Get secure erase information from card X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Read command class from csd register and secure erase support bit from ext csd register. Also calculate the erase timeout and secure erase timeout. If read ext csd error, error status should be returned instead of give some incorrect information. Error log: => => mmcinfo Device: FSL_SDHC Manufacturer ID: 0 OEM: 0 Name: Tran Speed: 0 Rd Block Len: 0 MMC version 0.0 High Capacity: No Capacity: 0 Bytes Bus Width: 1-bit => Signed-off-by: Haijun Zhang --- Changes for V2: - No changes drivers/mmc/mmc.c | 51 ++++++++++++++++++++++++++++++++++++++------------- 1 file changed, 38 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index e1461a9..4d583de 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -871,6 +871,8 @@ static int mmc_startup(struct mmc *mmc) } } + mmc->cmdclass = cmd.response[1] >> 20; + /* divide frequency by 10, since the mults are 10x bigger */ freq = fbase[(cmd.response[0] & 0x7)]; mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; @@ -939,7 +941,8 @@ static int mmc_startup(struct mmc *mmc) capacity *= MMC_MAX_BLOCK_LEN; if ((capacity >> 20) > 2 * 1024) mmc->capacity_user = capacity; - } + } else + return COMM_ERR; switch (ext_csd[EXT_CSD_REV]) { case 1: @@ -960,22 +963,20 @@ static int mmc_startup(struct mmc *mmc) } /* - * Host needs to enable ERASE_GRP_DEF bit if device is - * partitioned. This bit will be lost every time after a reset - * or power off. This will affect erase size. + * The granularity of the erasable units is the Erase Group:The + * smallest number of consecutive write blocks which can be + * addressed for erase. The size of the Erase Group is card + * specific and stored in the CSD when ERASE_GROUP_DEF is + * disabled, and in the EXT_CSD when ERASE_GROUP_DEF is + * enabled. */ - if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && - (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) { - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, - EXT_CSD_ERASE_GROUP_DEF, 1); - - if (err) - return err; - - /* Read out group size from ext_csd */ + if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) { mmc->erase_grp_size = ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * MMC_MAX_BLOCK_LEN * 1024; + + mmc->erase_timeout_mult = 300 * + ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; } else { /* Calculate the group size from the csd value. */ int erase_gsz, erase_gmul; @@ -985,6 +986,30 @@ static int mmc_startup(struct mmc *mmc) * (erase_gmul + 1); } + if (ext_csd[EXT_CSD_REV] >= 4) { + mmc->sec_feature_support = + ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT]; + mmc->sec_erase_mult = + ext_csd[EXT_CSD_SEC_ERASE_MULT]; + mmc->sec_erase_timeout = 300 * + ext_csd[EXT_CSD_SEC_ERASE_MULT] * + ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; + } + + /* + * Host needs to enable ERASE_GRP_DEF bit if device is + * partitioned. This bit will be lost every time after a reset + * or power off. This will affect erase size. + */ + if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && + (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) { + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_ERASE_GROUP_DEF, 1); + if (err) + return err; + } + + /* store the partition info of emmc */ if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || ext_csd[EXT_CSD_BOOT_MULT])