diff mbox

[U-Boot,2/2] T1040QDS: Add support of 2 stage SPI bootloader

Message ID 1383114848-18855-1-git-send-email-Priyanka.Jain@freescale.com
State Deferred
Delegated to: York Sun
Headers show

Commit Message

Priyanka Jain Oct. 30, 2013, 6:34 a.m. UTC 
Add support of 2-stage T1040QDS SPI bootloader using SPL framework.
In this, PBL (hardware) initializes SRAM (256K) and copy SPL
(192K) from SPI flash to SRAM and transfer control to SPL.
This SPL bootloader furthur initializes DDR using SPD and
environment and copy final u-boot image (512K) from SPI flash
to DDR and transfer control to final u-boot.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
---
Based on u-boot-mpc85xx/next branch.
This patch depends upon following patches:
1)[U-Boot] powerpc/t1040: enable PBL tool for T1040
	http://patchwork.ozlabs.org/patch/279366/
2)[U-Boot,1/6,v2] powerpc:Add support of SPL non-relocation
	http://patchwork.ozlabs.org/patch/286074/
3)[U-Boot,2/6,v2] powerpc/SPL:Allow Parsing of LAW table in both SPL & non SPL
	http://patchwork.ozlabs.org/patch/286075/
4)[U-Boot,3/6,v2] common/env: Point default envirenoment for GD
	http://patchwork.ozlabs.org/patch/286076/
5)[U-Boot,4/6,v2] Makefile:Add u-boot-with-spl-pbl.bin target for SPL
	http://patchwork.ozlabs.org/patch/286077/
6)[U-Boot,5/6,v2] SPL:Defines function required to env read for IFC & env_nand
	http://patchwork.ozlabs.org/patch/286078/
7)[U-Boot,6/6,v2] T1040QDS: Add support of 2 stage NAND boot loader
	http://patchwork.ozlabs.org/patch/286079/

 board/freescale/t1040qds/README |    9 +++++++++
 board/freescale/t1040qds/spl.c  |    2 ++
 boards.cfg                      |    1 +
 include/configs/T1040QDS.h      |   23 +++++++++++++++++++----
 4 files changed, 31 insertions(+), 4 deletions(-)

Comments

Rommel G Custodio March 25, 2014, 10:49 p.m. UTC | #1 
Dear Priyanka Jain,

Priyanka Jain <Priyanka.Jain <at> freescale.com> writes:

> 
> Add support of 2-stage T1040QDS SPI bootloader using SPL framework.
> In this, PBL (hardware) initializes SRAM (256K) and copy SPL
> (192K) from SPI flash to SRAM and transfer control to SPL.
> This SPL bootloader furthur initializes DDR using SPD and
> environment and copy final u-boot image (512K) from SPI flash
> to DDR and transfer control to final u-boot.

Is this code already in mainline? Or in the FSL SDK (which version)?

I'm locally testing out these series of patches on the QDS and it doesn't want 
to boot. The DIP switches are set to serial NOR Flash, which contains RCW + 
PBI + SPL + main u-boot.

><8 snip 8><

All the best,
Rommel
Priyanka Jain March 26, 2014, 3:54 a.m. UTC | #2 
Hello Rommel,

This patch is abandoned. We are working on new set of patches.
We will send them upstream and in FSL SDK once ready.

Regards
Priyanka


> -----Original Message-----
> From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de]
> On Behalf Of Rommel G Custodio
> Sent: Wednesday, March 26, 2014 4:19 AM
> To: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 2/2] T1040QDS: Add support of 2 stage SPI
> bootloader
> 
> Dear Priyanka Jain,
> 
> Priyanka Jain <Priyanka.Jain <at> freescale.com> writes:
> 
> >
> > Add support of 2-stage T1040QDS SPI bootloader using SPL framework.
> > In this, PBL (hardware) initializes SRAM (256K) and copy SPL
> > (192K) from SPI flash to SRAM and transfer control to SPL.
> > This SPL bootloader furthur initializes DDR using SPD and environment
> > and copy final u-boot image (512K) from SPI flash to DDR and transfer
> > control to final u-boot.
> 
> Is this code already in mainline? Or in the FSL SDK (which version)?
> 
> I'm locally testing out these series of patches on the QDS and it doesn't
> want to boot. The DIP switches are set to serial NOR Flash, which
> contains RCW + PBI + SPL + main u-boot.
> 
> ><8 snip 8><
> 
> All the best,
> Rommel
> 
> 
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
diff mbox

Patch

diff --git a/board/freescale/t1040qds/README b/board/freescale/t1040qds/README
index 0e4d32e..6235246 100644
--- a/board/freescale/t1040qds/README
+++ b/board/freescale/t1040qds/README
@@ -195,8 +195,17 @@  SPL has following features:
  -----------------------------------------------
 
 Command to build 2 stage NAND boot loader
+--------------------------------------------
  - modify RCW at board/freescale/t1040qds/t1040_rcw.cfg for nand boot
      -66000002 00000000 fc027000 01000000
      +66000002 00000000 ec106000 01000000
  - make T1040QDS_NAND_config
  - make u-boot-with-spl-pbl.bin
+
+Command to build 2 stage SPI boot loader
+-------------------------------------------
+ - modify RCW at board/freescale/t1040qds/t1040_rcw.cfg for spi boot
+     -66000002 00000000 fc027000 01000000
+     +66000002 00000000 58027000 01000000
+ - make T1040QDS_SPIFLASH_config
+ - make u-boot-with-spl-pbl.bin
diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
index 5f39466..60770f0 100644
--- a/board/freescale/t1040qds/spl.c
+++ b/board/freescale/t1040qds/spl.c
@@ -118,5 +118,7 @@  void board_init_r(gd_t *gd, ulong dest_addr)
 
 #ifdef CONFIG_SPL_NAND_BOOT
 	nand_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	spi_boot();
 #endif
 }
diff --git a/boards.cfg b/boards.cfg
index 295d952..56f522e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -964,6 +964,7 @@  Active  powerpc     mpc85xx        -           freescale       t4qds
 Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SRIO_PCIE_BOOT              T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                  -
 Active  powerpc     mpc85xx        -           freescale       t1040qds            T1040QDS                             T1040QDS:PPC_T1040                                                                                                                Naveen Burmi <NaveenBurmi@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       t1040qds            T1040QDS_NAND                        T1040QDS:PPC_T1040,RAMBOOT_PBL,NAND                                                                                                      Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Active  powerpc     mpc85xx        -           freescale       t1040qds            T1040QDS_SPIFLASH                    T1040QDS:PPC_T1040,RAMBOOT_PBL,SPIFLASH                                                                                       Poonam Aggrwal <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_36BIT_SDCARD          controlcenterd:36BIT,SDCARD                                                                                                       Dirk Eibach <eibach@gdsys.de>
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_36BIT_SDCARD_DEVELOP  controlcenterd:36BIT,SDCARD,DEVELOP                                                                                               Dirk Eibach <eibach@gdsys.de>
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_TRAILBLAZER           controlcenterd:TRAILBLAZER,SPIFLASH                                                                                               Dirk Eibach <eibach@gdsys.de>
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 6269ce5..27b812d 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -43,7 +43,6 @@ 
 #define CONFIG_SPL_I2C_SUPPORT
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SKIP_RELOCATE_SPL
-#define CONFIG_SYS_TEXT_BASE		0x00201000
 #define CONFIG_SPL_TEXT_BASE		0xFFFD0000
 #define CONFIG_SPL_PAD_TO		0x80000
 #define CONFIG_SPL_MAX_SIZE		0x30000
@@ -55,9 +54,22 @@ 
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(512 << 10)
+#define CONFIG_SYS_TEXT_BASE		0x00201000
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #define CONFIG_SPL_NAND_BOOT
 #endif
+#ifdef CONFIG_SPIFLASH
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x280000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x2ff000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(512 << 10)
+#define CONFIG_SYS_TEXT_BASE		0x280000
+#define CONFIG_RESET_VECTOR_ADDRESS	0x2ffffc
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#endif
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
@@ -107,14 +119,17 @@ 
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #endif
 
-#ifndef CONFIG_SYS_NO_FLASH
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS              0
 #define CONFIG_ENV_SPI_CS               0
 #define CONFIG_ENV_SPI_MAX_HZ           10000000
 #define CONFIG_ENV_SPI_MODE             0
+#endif
+
+#ifndef CONFIG_SYS_NO_FLASH
+#if defined(CONFIG_SPIFLASH)
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000