diff --git a/doc/README.nand b/doc/README.nand
index f9c921e..287eec5 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -179,6 +179,15 @@ Configuration Options:
 	This is used by SoC platforms which do not have built-in ELM
 	hardware engine required for BCH ECC correction.
 
+   CONFIG_SYS_NAND_DEVICE_WIDTH
+	Specifies bus-width of the default NAND device connected to SoC.
+	This config is useful for driver which cannot self initialize or
+	parse ONFI parameter (like SPL drivers), or for supporting non-ONFI
+	compliant devices.
+	This config can take following values:
+	- 8: x8 NAND devices is connected
+	- 16: x16 NAND device is connected
+
 Platform specific options
 =========================
 
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 24e6f8f..a7261f9 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -759,13 +759,19 @@ int board_nand_init(struct nand_chip *nand)
 	nand->priv	= &bch_priv;
 	nand->cmd_ctrl	= omap_nand_hwcontrol;
 	nand->options	|= NAND_NO_PADDING | NAND_CACHEPRG;
-	/* If we are 16 bit dev, our gpmc config tells us that */
-	if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000)
-		nand->options |= NAND_BUSWIDTH_16;
-
 	nand->chip_delay = 100;
 	nand->ecc.layout = &omap_ecclayout;
 
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYS_NAND_ONFI_DETECTION)
+	/* device bus-width determined from ONFI params */
+	nand->options	&= ~NAND_BUSWIDTH_16;
+#else
+	/* device bus-width passed via CONFIG_xx */
+	if (CONFIG_SYS_NAND_DEVICE_WIDTH == 16)
+		nand->options |= NAND_BUSWIDTH_16;
+	else
+		nand->options &= ~NAND_BUSWIDTH_16;
+#endif
 	/* select ECC scheme */
 	if (omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,
 				   CONFIG_SYS_NAND_PAGE_SIZE,
@@ -782,5 +788,13 @@ int board_nand_init(struct nand_chip *nand)
 	nand->dev_ready = omap_spl_dev_ready;
 #endif
 
+	/* reconfigure GPMC.CONFIG1 register with correct device-width */
+	gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
+	if (CONFIG_SYS_NAND_DEVICE_WIDTH == 16)
+		gpmc_config |= (0x1 << 12);
+	else
+		gpmc_config &= ~(0x1 << 12);
+	writel(gpmc_config, &gpmc_cfg->cs[cs].config1);
+
 	return 0;
 }
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 994e235..c2ccc97 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -216,6 +216,7 @@
 
 #ifdef CONFIG_NAND
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_BLOCK_SIZE	131072
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
@@ -364,7 +365,6 @@
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:128k(SPL)," \
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 1fd2508..0985221 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -269,7 +269,6 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_ENV_IS_IN_NAND		1
 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
 
@@ -332,6 +331,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 6500878..8593d44 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -263,7 +263,6 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_ENV_IS_IN_NAND		1
 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
 
@@ -326,6 +325,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index bc5b66c..1e3dd0d 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -164,8 +164,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 /* Environment information */
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index cb79b4e..d6c64a3 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -116,8 +116,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 #define CONFIG_JFFS2_NAND
@@ -318,6 +316,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/dig297.h b/include/configs/dig297.h
index 30e3908..f69bcec 100644
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@@ -143,8 +143,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 
 #if defined(CONFIG_CMD_NET)
diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h
index 3e18a65..ce6b9be 100644
--- a/include/configs/igep0033.h
+++ b/include/configs/igep0033.h
@@ -188,7 +188,6 @@
 /* NAND support */
 #define CONFIG_NAND
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_SYS_NAND_BASE		(0x08000000)	/* phys address CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION	1
@@ -248,11 +247,12 @@
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
-					 CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
+					 CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index 9982cf6..7e5bc9b 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -268,7 +268,6 @@
 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M /* Configure the PISMO */
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_BASE		NAND_BASE
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
 #define CONFIG_ENV_IS_IN_NAND	        1
 #define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
@@ -354,6 +353,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 5e27ab2..d508978 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -322,7 +322,6 @@
 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET		0x180000 /* environment starts here */
 
@@ -385,6 +384,7 @@
 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index c1245e7..9050f55 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -184,8 +184,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 
@@ -424,6 +422,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h
index edf6543..564af9a 100644
--- a/include/configs/omap3_evm_common.h
+++ b/include/configs/omap3_evm_common.h
@@ -210,7 +210,6 @@
 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
 #elif defined(CONFIG_CMD_ONENAND)
 #define CONFIG_SYS_FLASH_BASE		PISMO1_ONEN_BASE
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index ee6db51..e198c4c 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -298,7 +298,6 @@
 
 #if defined(CONFIG_CMD_NAND)
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
 #endif
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 88380a4..de06e20 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -120,8 +120,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand */
 							/* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
 						/* devices */
 #define CONFIG_JFFS2_NAND
@@ -317,6 +315,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 91a2568..6ea106d 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -131,8 +131,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand */
 							/* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
 						/* devices */
 
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index c747d52..1dd7b9c 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -138,8 +138,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 #define CONFIG_JFFS2_NAND
diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h
index cb8c7ec..9ca7fbe 100644
--- a/include/configs/omap3_zoom2.h
+++ b/include/configs/omap3_zoom2.h
@@ -158,7 +158,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Environment information */
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 5426ee8..197accc 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -182,11 +182,12 @@
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
-					 CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
+					 CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
@@ -433,7 +434,6 @@
 		"\0"
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
 #define CONFIG_SYS_NAND_BASE		(0x08000000)	/* physical address */
 							/* to access nand at */
 							/* CS0 */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 60dd8ff..1f31a87 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -188,7 +188,6 @@
 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET		0x180000 /* environment starts here */
 
@@ -252,6 +251,7 @@
 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 27db618..019052a 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -106,8 +106,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 #define CONFIG_BCH
@@ -284,6 +282,7 @@
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
