Message ID | 1371811366-336-1-git-send-email-sr@denx.de |
---|---|
State | Superseded |
Delegated to: | Tom Rini |
Headers | show |
Hi Stefan, On Fri, 21 Jun 2013 12:42:46 +0200, Stefan Roese <sr@denx.de> wrote: > Fix a problem with a re-assignment of r8 in the SPL version. > > This patch now moves the call to s_init() to a later stage, right before > calling board_init_f(). And makes sure that r8 is correctly initialized > before s_init() is called. r8 now is only written in crt0.S. > > This error was detected on the SPL port for the Compulab CM-T35 board > (OMAP3530). > > Signed-off-by: Stefan Roese <sr@denx.de> > Cc: Tom Rini <trini@ti.com> > Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> > --- > v4: > - Corrected commit text to reflect changed patch > > v3: > - Some code shuffling in crt0.S as requested by Albert > > v2: > - Change handling/initializing of r8 as suggested by Albert. > It should only be written in crt0.S. > > Tom, while working on this version one question came up: > Is lowlevel_init() (file arch/arm/cpu/armv7/omap3/lowlevel_init.S) > needed any more? It calls cpy_clk_code() to copy some clk init > code into SRAM. But I fail to see if and where this code is really > executed from SRAM. Maybe I missed something. Perhaps you could > shed some light into this. > > Thanks, Stefan > > arch/arm/cpu/armv7/omap3/board.c | 2 -- > arch/arm/cpu/armv7/omap3/lowlevel_init.S | 3 +-- > arch/arm/lib/crt0.S | 5 +++++ > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c > index b72fadc..8f41dcd 100644 > --- a/arch/arm/cpu/armv7/omap3/board.c > +++ b/arch/arm/cpu/armv7/omap3/board.c > @@ -256,8 +256,6 @@ void s_init(void) > #endif > > #ifdef CONFIG_SPL_BUILD > - gd = &gdata; > - > preloader_console_init(); > > timer_init(); > diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S > index eacfef8..8539093 100644 > --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S > +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S > @@ -226,8 +226,7 @@ ENTRY(lowlevel_init) > #endif /* NAND Boot */ > mov lr, ip /* restore link reg */ > ldr ip, [sp] /* restore save ip */ > - /* tail-call s_init to setup pll, mux, memory */ > - b s_init > + mov pc, lr > > ENDPROC(lowlevel_init) > > diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S > index a5bffb8..9bd7c24 100644 > --- a/arch/arm/lib/crt0.S > +++ b/arch/arm/lib/crt0.S > @@ -83,9 +83,14 @@ ENTRY(_main) > ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) > #endif > bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ > +#if defined(CONFIG_SPL_BUILD) > + ldr r8, =gdata /* SPL assigns r8 directly to &gdata */ > + bl s_init /* s_init() needs GD to be setup */ > +#else > sub sp, #GD_SIZE /* allocate one GD above SP */ > bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ > mov r8, sp /* GD is above SP */ > +#endif > mov r0, #0 > bl board_init_f > Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Amicalement,
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index b72fadc..8f41dcd 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -256,8 +256,6 @@ void s_init(void) #endif #ifdef CONFIG_SPL_BUILD - gd = &gdata; - preloader_console_init(); timer_init(); diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index eacfef8..8539093 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -226,8 +226,7 @@ ENTRY(lowlevel_init) #endif /* NAND Boot */ mov lr, ip /* restore link reg */ ldr ip, [sp] /* restore save ip */ - /* tail-call s_init to setup pll, mux, memory */ - b s_init + mov pc, lr ENDPROC(lowlevel_init) diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index a5bffb8..9bd7c24 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -83,9 +83,14 @@ ENTRY(_main) ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) #endif bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ +#if defined(CONFIG_SPL_BUILD) + ldr r8, =gdata /* SPL assigns r8 directly to &gdata */ + bl s_init /* s_init() needs GD to be setup */ +#else sub sp, #GD_SIZE /* allocate one GD above SP */ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ mov r8, sp /* GD is above SP */ +#endif mov r0, #0 bl board_init_f