@@ -43,13 +43,15 @@ DECLARE_GLOBAL_DATA_PTR;
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
-static struct gpio_bank gpio_bank_54xx[6] = {
+static struct gpio_bank gpio_bank_54xx[8] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO7_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO8_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
@@ -46,5 +46,7 @@
#define OMAP54XX_GPIO4_BASE 0x48059000
#define OMAP54XX_GPIO5_BASE 0x4805B000
#define OMAP54XX_GPIO6_BASE 0x4805D000
+#define OMAP54XX_GPIO7_BASE 0x48051000
+#define OMAP54XX_GPIO8_BASE 0x48053000
#endif /* _GPIO_OMAP5_H */
OMAP54XX and DRA7XX SoCs have 8 banks per 32 GPIOs, that is, 256 in total. Fix the gpio bank setting. Signed-off-by: Axel Lin <axel.lin@ingics.com> --- arch/arm/cpu/armv7/omap5/hwinit.c | 4 +++- arch/arm/include/asm/arch-omap5/gpio.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-)