From patchwork Tue Jun 4 09:01:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 248509 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E5A2A2C007E for ; Tue, 4 Jun 2013 19:01:30 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03F5A4A125; Tue, 4 Jun 2013 11:01:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jZXiNZkeVzwu; Tue, 4 Jun 2013 11:01:27 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9483A4A112; Tue, 4 Jun 2013 11:01:24 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8329C4A0FD for ; Tue, 4 Jun 2013 11:01:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MmyW5l6tYGhC for ; Tue, 4 Jun 2013 11:01:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 BL_NJABL=SKIP(-1.5) (only DNSBL check requested) Received: from pollux.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by theia.denx.de (Postfix) with ESMTP id 894164A112 for ; Tue, 4 Jun 2013 11:01:07 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id 2591B7F7E; Tue, 4 Jun 2013 11:01:07 +0200 (CEST) From: Heiko Schocher To: u-boot@lists.denx.de Date: Tue, 4 Jun 2013 11:01:06 +0200 Message-Id: <1370336466-14617-1-git-send-email-hs@denx.de> X-Mailer: git-send-email 1.7.11.7 MIME-Version: 1.0 Cc: Tom Rini , Heiko Schocher Subject: [U-Boot] =?utf-8?q?arm=2C_am335x=3A_make_mpu_pll_config_configura?= =?utf-8?q?ble?= X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher Cc: Tom Rini --- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 9 +++++++-- arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + 2 Dateien geändert, 8 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-) diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c index a1efc75..9c4d0b4 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c @@ -246,7 +246,7 @@ static void enable_per_clocks(void) ; } -static void mpu_pll_config(void) +void mpu_pll_config_val(int mpull_m) { u32 clkmode, clksel, div_m2; @@ -260,7 +260,7 @@ static void mpu_pll_config(void) ; clksel = clksel & (~CLK_SEL_MASK); - clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N); + clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N); writel(clksel, &cmwkup->clkseldpllmpu); div_m2 = div_m2 & ~CLK_DIV_MASK; @@ -274,6 +274,11 @@ static void mpu_pll_config(void) ; } +static void mpu_pll_config(void) +{ + mpu_pll_config_val(CONFIG_SYS_MPUCLK); +} + static void core_pll_config(void) { u32 clkmode, clksel, div_m4, div_m5, div_m6; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 2422924..fbeff1a 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -31,6 +31,7 @@ int print_cpuinfo(void); extern struct ctrl_stat *cstat; u32 get_device_type(void); void setup_clocks_for_console(void); +void mpu_pll_config_val(int mpull_m); void ddr_pll_config(unsigned int ddrpll_M); void sdelay(unsigned long);