From patchwork Wed Apr 10 07:06:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 235310 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0DE4D2C00C6 for ; Wed, 10 Apr 2013 17:09:55 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 89E544A030; Wed, 10 Apr 2013 09:09:47 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XTf70jpEdWzI; Wed, 10 Apr 2013 09:09:47 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 368BA4A020; Wed, 10 Apr 2013 09:08:39 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 734FE4A020 for ; Wed, 10 Apr 2013 09:07:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id N0G+r1qC6DJp for ; Wed, 10 Apr 2013 09:07:32 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo-p05-ob.rzone.de (mo-p05-ob.rzone.de [81.169.146.181]) by theia.denx.de (Postfix) with ESMTP id C5C444A025 for ; Wed, 10 Apr 2013 09:06:45 +0200 (CEST) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohdvpEkce+Ub4+ReKfHD+mCPYMrYBXgQ== X-RZG-CLASS-ID: mo05 Received: from ubuntu-2012.fritz.box (p57B94BB4.dip.t-dialin.net [87.185.75.180]) by smtp.strato.de (joses mo3) (RZmta 31.24 DYNA|AUTH) with ESMTPA id g0799ap3A6F0Et ; Wed, 10 Apr 2013 09:06:39 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Date: Wed, 10 Apr 2013 09:06:10 +0200 Message-Id: <1365577570-12384-5-git-send-email-sr@denx.de> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1365577570-12384-1-git-send-email-sr@denx.de> References: <1365577570-12384-1-git-send-email-sr@denx.de> Cc: Marek Vasut , Fabio Estevam , Scott Wood Subject: [U-Boot] [PATCH 4/4] mtd: mxs_nand: Add support for i.MX6 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Stefan Roese Cc: Stefano Babic Cc: Marek Vasut Cc: Fabio Estevam Cc: Scott Wood Acked-by: Scott Wood --- arch/arm/cpu/armv7/mx6/soc.c | 7 +++++++ arch/arm/include/asm/imx-common/regs-bch.h | 10 ++++++++++ drivers/mtd/nand/mxs_nand.c | 11 +++++++++-- 3 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 193ba12..7596526 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -30,6 +30,7 @@ #include #include #include +#include #include struct scu_regs { @@ -139,6 +140,12 @@ int arch_cpu_init(void) set_vddsoc(1200); /* Set VDDSOC to 1.2V */ imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ + +#ifdef CONFIG_APBH_DMA + /* Start APBH DMA */ + mxs_dma_init(); +#endif + return 0; } diff --git a/arch/arm/include/asm/imx-common/regs-bch.h b/arch/arm/include/asm/imx-common/regs-bch.h index 3a73de4..dbe7ac8 100644 --- a/arch/arm/include/asm/imx-common/regs-bch.h +++ b/arch/arm/include/asm/imx-common/regs-bch.h @@ -136,8 +136,13 @@ struct mxs_bch_regs { #define BCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24 #define BCH_FLASHLAYOUT0_META_SIZE_MASK (0xff << 16) #define BCH_FLASHLAYOUT0_META_SIZE_OFFSET 16 +#if defined(CONFIG_MX6) +#define BCH_FLASHLAYOUT0_ECC0_MASK (0x1f << 11) +#define BCH_FLASHLAYOUT0_ECC0_OFFSET 11 +#else #define BCH_FLASHLAYOUT0_ECC0_MASK (0xf << 12) #define BCH_FLASHLAYOUT0_ECC0_OFFSET 12 +#endif #define BCH_FLASHLAYOUT0_ECC0_NONE (0x0 << 12) #define BCH_FLASHLAYOUT0_ECC0_ECC2 (0x1 << 12) #define BCH_FLASHLAYOUT0_ECC0_ECC4 (0x2 << 12) @@ -161,8 +166,13 @@ struct mxs_bch_regs { #define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0xffff << 16) #define BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET 16 +#if defined(CONFIG_MX6) +#define BCH_FLASHLAYOUT1_ECCN_MASK (0x1f << 11) +#define BCH_FLASHLAYOUT1_ECCN_OFFSET 11 +#else #define BCH_FLASHLAYOUT1_ECCN_MASK (0xf << 12) #define BCH_FLASHLAYOUT1_ECCN_OFFSET 12 +#endif #define BCH_FLASHLAYOUT1_ECCN_NONE (0x0 << 12) #define BCH_FLASHLAYOUT1_ECCN_ECC2 (0x1 << 12) #define BCH_FLASHLAYOUT1_ECCN_ECC4 (0x2 << 12) diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index c21fd69..398e4dd 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -42,6 +42,11 @@ #define MXS_NAND_DMA_DESCRIPTOR_COUNT 4 #define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512 +#if defined(CONFIG_MX6) +#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 2 +#else +#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 0 +#endif #define MXS_NAND_METADATA_SIZE 10 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 @@ -982,14 +987,16 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd) tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET; tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) << BCH_FLASHLAYOUT0_ECC0_OFFSET; - tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE; + tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE + >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; writel(tmp, &bch_regs->hw_bch_flash0layout0); tmp = (mtd->writesize + mtd->oobsize) << BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET; tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) << BCH_FLASHLAYOUT1_ECCN_OFFSET; - tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE; + tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE + >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; writel(tmp, &bch_regs->hw_bch_flash0layout1); /* Set *all* chip selects to use layout 0 */