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[U-Boot,v2,batch,3,13/17] powerpc/mpc8xxx: Allow board file to override DDR address assignment

Message ID 1364233180-31149-13-git-send-email-yorksun@freescale.com
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Commit Message

York Sun March 25, 2013, 5:39 p.m. UTC 
This gives boards flexibility to assign other than default addresses to each
DDR controller. For example, DDR controler 2 can have 0 as the base and DDR
controller 1 has higher memory.

Signed-off-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc8xxx/ddr/main.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 1a8d593..7a8636d 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -186,7 +186,7 @@  const char * step_to_string(unsigned int step) {
 	return step_string_tbl[s];
 }
 
-unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
+static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo,
 			  unsigned int dbw_cap_adj[])
 {
 	int i, j;
@@ -354,6 +354,11 @@  unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
 	return total_mem;
 }
 
+/* Use weak function to allow board file to override the address assignment */
+__attribute__((weak, alias("__step_assign_addresses")))
+unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
+			  unsigned int dbw_cap_adj[]);
+
 unsigned long long
 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
 				       unsigned int size_only)