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Sat, 29 Dec 2012 00:30:54 +0900 (KST) Received: from chrome-ubuntu.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFQ008MSZ2SO710@mmp2.samsung.com> for u-boot@lists.denx.de; Sat, 29 Dec 2012 00:30:54 +0900 (KST) From: Amar To: u-boot@lists.denx.de, jh80.chung@samsung.com Date: Fri, 28 Dec 2012 10:52:51 -0500 Message-id: <1356709972-26549-9-git-send-email-amarendra.xt@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1356709972-26549-1-git-send-email-amarendra.xt@samsung.com> References: <1356709972-26549-1-git-send-email-amarendra.xt@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsWyRsSkWld/990Ag2eLOC3e7u1kd2D0OHtn B2MAYxSXTUpqTmZZapG+XQJXxu9bSxkLnihVLG1ZwNTAeF2mi5GTQ0LAROLMxEtsELaYxIV7 64FsLg4hgaWMEk2T17PAFO3tv8AKkZjOKPHn9DKwhJDAMiaJLb9suhg5ONgEVCV+LbYHCYsI GEhMf7KdFSTMLFAg8Wy3GEhYWMBI4sG11WC7WICqt79/zQpi8wp4SGze+QbqBjmJD3sesYPY nAKeEo+eLWKG2OQhcXXTLqheAYlvkw+xgIyXEJCV2HSAGeQyCYHrbBKvPq6BOllS4uCKGywT GIUXMDKsYhRNLUguKE5KzzXUK07MLS7NS9dLzs/dxAgMwNP/nkntYFzZYHGIUYCDUYmHd2HP nQAh1sSy4srcQ4wSHMxKIrx9zXcDhHhTEiurUovy44tKc1KLDzH6AF0ykVlKNDkfGB15JfGG xibmpsamlkZGZqamOISVxHmbPVIChATSE0tSs1NTC1KLYMYxcXBKNTBONfjvdN77m5F9a8G5 5b/KTHcxut7T8JPdu9Es7o6zWdnkzqyNFzmfHvh2PSuTw6zI4Ux0RYkMa9v02okTP4SXXQ8W /imdYPYll8G10rbrhZdQw+tLmhoOqmZrlf3WF4UzFr6fdmL51O0PD6hZt0SzcvawbA4KPMsb MVG6/dvh+Jq9Sy5fFldiKc5INNRiLipOBAA3HmUIbQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeLIzCtJLcpLzFFi42I5/e+xoK7e7rsBBl1XzC3e7u1kd2D0OHtn B2MAY1QDo01GamJKapFCal5yfkpmXrqtkndwvHO8qZmBoa6hpYW5kkJeYm6qrZKLT4CuW2YO 0FglhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bvW0sZC54oVSxtWcDU wHhdpouRk0NCwERib/8FVghbTOLCvfVsXYxcHEIC0xkl/pxexgKSEBJYxiSx5ZdNFyMHB5uA qsSvxfYgYREBA4npT7azgoSZBQoknu0WAwkLCxhJPLi2mg3EZgGq3v7+Ndh4XgEPic0737BB rJKT+LDnETuIzSngKfHo2SJmiE0eElc37WKbwMi7gJFhFaNoakFyQXFSeq6hXnFibnFpXrpe cn7uJkZweD+T2sG4ssHiEKMAB6MSD+/CnjsBQqyJZcWVuYcYJTiYlUR4+5rvBgjxpiRWVqUW 5ccXleakFh9i9AG6aiKzlGhyPjD28kriDY1NzE2NTS1NLEzMLHEIK4nzNnukBAgJpCeWpGan phakFsGMY+LglGpgnLuJdf+V31vjymtj6iV2HOufNt+088hUodmht//F7Y2r5xeLLxJw6fwr V6MVJMe41eTJJQHPavGmkCp9v9mM55yPCswPO75uo/QNi/iHKzYdSFO5qhAS7z3pxvTwyXya zmF7332uCX19WvHCbT0b/+KEGdaS35OyZRmeJWaU19ouEPqg9H+PEktxRqKhFnNRcSIA2OMn aJwCAAA= X-CFilter-Loop: Reflected Cc: afleming@gmail.com, patches@linaro.org Subject: [U-Boot] [PATCH 8/9] SMDK5250: Enable EMMC booting X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds support for EMMC booting on SMDK5250. Signed-off-by: Amar --- board/samsung/smdk5250/clock_init.c | 18 +++++++++++++ board/samsung/smdk5250/clock_init.h | 5 ++++ board/samsung/smdk5250/spl_boot.c | 52 ++++++++++++++++++++++++++++++++----- 3 files changed, 69 insertions(+), 6 deletions(-) diff --git a/board/samsung/smdk5250/clock_init.c b/board/samsung/smdk5250/clock_init.c index c009ae5..90d2199 100644 --- a/board/samsung/smdk5250/clock_init.c +++ b/board/samsung/smdk5250/clock_init.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "clock_init.h" #include "setup.h" @@ -664,3 +665,20 @@ void clock_init_dp_clock(void) /* We run DP at 267 Mhz */ setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); } + +/* + * Set clock divisor value for booting from emmc. + * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz. + */ +void emmc_boot_clk_div_set(void) +{ + struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE; + unsigned int addr; + unsigned int div_mmc; + + addr = (unsigned int) &clk->div_fsys1; + + div_mmc = readl(addr) & ~FSYS1_MMC0_DIV_MASK; + div_mmc |= FSYS1_MMC0_DIV_VAL; + writel(div_mmc, addr); +} diff --git a/board/samsung/smdk5250/clock_init.h b/board/samsung/smdk5250/clock_init.h index f751bcb..9b156f7 100644 --- a/board/samsung/smdk5250/clock_init.h +++ b/board/samsung/smdk5250/clock_init.h @@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void); * Initialize clock for the device */ void system_clock_init(void); + +/* + * Set clock divisor value for booting from emmc. + */ +void emmc_boot_clk_div_set(void); #endif diff --git a/board/samsung/smdk5250/spl_boot.c b/board/samsung/smdk5250/spl_boot.c index d8f3c1e..e94677b 100644 --- a/board/samsung/smdk5250/spl_boot.c +++ b/board/samsung/smdk5250/spl_boot.c @@ -23,16 +23,41 @@ #include #include +#include +#include +#include + +#include "clock_init.h" + +/* Index into irom ptr table */ +enum index { + MMC_INDEX, + EMMC44_INDEX, + EMMC44_END_INDEX, + SPI_INDEX, +}; + +/* IROM Function Pointers Table */ +void (*irom_ptr_table[])(void) = { + [MMC_INDEX] = (void *)0x02020030, /* iROM Function Pointer + -SDMMC boot */ + [EMMC44_INDEX] = (void *)0x02020044, /* iROM Function Pointer + -EMMC 4.4 boot */ + [EMMC44_END_INDEX] = (void *)0x02020048,/* iROM Function Pointer + -EMMC 4.4 end boot opration */ + [SPI_INDEX] = (void *)0x02020058, /* iROM Function Pointer + -SPI boot */ + }; + enum boot_mode { BOOT_MODE_MMC = 4, BOOT_MODE_SERIAL = 20, + BOOT_MODE_EMMC = 8, /* EMMC4.4 */ /* Boot based on Operating Mode pin settings */ BOOT_MODE_OM = 32, BOOT_MODE_USB, /* Boot using USB download */ }; - typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); - /* * Copy U-boot from mmc to RAM: * COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains @@ -40,23 +65,38 @@ enum boot_mode { */ void copy_uboot_to_ram(void) { - spi_copy_func_t spi_copy; enum boot_mode bootmode; - u32 (*copy_bl2)(u32, u32, u32); + u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst); + u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst); + u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst); + void (*end_bootop_from_emmc)(void); bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT; switch (bootmode) { case BOOT_MODE_SERIAL: - spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR; + spi_copy = (void *) *(u32 *)irom_ptr_table[SPI_INDEX]; spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE, CONFIG_SYS_TEXT_BASE); break; case BOOT_MODE_MMC: - copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR; + copy_bl2 = (void *) *(u32 *)irom_ptr_table[MMC_INDEX]; copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE); break; + case BOOT_MODE_EMMC: + emmc_boot_clk_div_set(); + + copy_bl2_from_emmc = + (void *) *(u32 *)irom_ptr_table[EMMC44_INDEX]; + end_bootop_from_emmc = + (void *) *(u32 *)irom_ptr_table[EMMC44_END_INDEX]; + + copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE); + end_bootop_from_emmc(); + + break; + default: break; }