From patchwork Thu Aug 30 00:16:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Sharp X-Patchwork-Id: 180779 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0FCC12C013E for ; Thu, 30 Aug 2012 10:17:00 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AF4FB28097; Thu, 30 Aug 2012 02:16:58 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XMiR5SHcAdBH; Thu, 30 Aug 2012 02:16:58 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A460528081; Thu, 30 Aug 2012 02:16:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 13CFA28088 for ; Thu, 30 Aug 2012 02:16:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UcJm2NyIL21k for ; Thu, 30 Aug 2012 02:16:54 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 6D24D28086 for ; Thu, 30 Aug 2012 02:16:46 +0200 (CEST) Received: by pbbrr4 with SMTP id rr4so2082189pbb.3 for ; Wed, 29 Aug 2012 17:16:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references:to; bh=b4yt56pt5ebxOz7ANbG9iq9N/+XESaMuj1Sa9zztiV8=; b=xQCw8czEPxCaD4Xr6VnUpI5gjshlZPBEJyw4MZ9+CqMkSGyghg8pdGIOV7IbAVd9gi ew1gxetgwd2GkgIqKRBQbpjXOAR5gn5hWjr6BalqEmpld597uUz6xJSlc36cFlPcdzaM qnQzAo1EgHk3qWnW842UfvMCq/eN0sMn2kuj5i4GpOTgsDZ0T9OEZFSQ6zpyvENbWl47 pxRbyWyYSVmsIp4rxXmim6cMIl83X0FLz40/8fqRXxodyUmMOlzh215ZkWrDYAimEt4t PBwkuMrMPMNaQD0RSXEg4lexoRKpsg3t+Xw4nG++iS7Lj+9ZZxB7eGjIlPdH7RtiVCbJ D5ew== Received: by 10.68.237.34 with SMTP id uz2mr7975515pbc.71.1346285804646; Wed, 29 Aug 2012 17:16:44 -0700 (PDT) Received: from localhost.localdomain ([132.237.245.15]) by mx.google.com with ESMTPS id st6sm314530pbc.58.2012.08.29.17.16.42 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 29 Aug 2012 17:16:43 -0700 (PDT) From: Andrew Sharp To: Date: Wed, 29 Aug 2012 17:16:28 -0700 Message-Id: <1346285792-32292-2-git-send-email-andywyse6@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1346285792-32292-1-git-send-email-andywyse6@gmail.com> References: <1346285792-32292-1-git-send-email-andywyse6@gmail.com> To: Subject: [U-Boot] [PATCH v2 1/5] pci: fix errant data types and corresponding access functions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de In a couple of places, unsigned int and pci_config_*_dword were being used when u16 and _word should be used. Unsigned int was also being used in a couple of places that should be pci_addr_t. Signed-off-by: Andrew Sharp --- drivers/pci/pci.c | 7 ++++--- drivers/pci/pci_auto.c | 15 ++++++++------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 398542b..cd78312 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -118,11 +118,11 @@ PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff) void *pci_map_bar(pci_dev_t pdev, int bar, int flags) { pci_addr_t pci_bus_addr; - u32 bar_response; + pci_addr_t bar_response; /* read BAR address */ pci_read_config_dword(pdev, bar, &bar_response); - pci_bus_addr = (pci_addr_t)(bar_response & ~0xf); + pci_bus_addr = bar_response & ~0xf; /* * Pass "0" as the length argument to pci_bus_to_virt. The arg @@ -385,7 +385,8 @@ int pci_hose_config_device(struct pci_controller *hose, pci_addr_t mem, unsigned long command) { - unsigned int bar_response, old_command; + pci_addr_t bar_response; + unsigned int old_command; pci_addr_t bar_value; pci_size_t bar_size; unsigned char pin; diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 87ee2c2..2338706 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -88,15 +88,15 @@ void pciauto_setup_device(struct pci_controller *hose, struct pci_region *prefetch, struct pci_region *io) { - unsigned int bar_response; + pci_addr_t bar_response; pci_addr_t bar_value; pci_size_t bar_size; - unsigned int cmdstat = 0; + u16 cmdstat = 0; struct pci_region *bar_res; int bar, bar_nr = 0; int found_mem64 = 0; - pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); + pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER; for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { @@ -167,7 +167,7 @@ void pciauto_setup_device(struct pci_controller *hose, bar_nr++; } - pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); + pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat); pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, CONFIG_SYS_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); @@ -179,9 +179,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, struct pci_region *pci_mem = hose->pci_mem; struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; - unsigned int cmdstat; + u16 cmdstat; - pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); + pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); /* Configure bus number registers */ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, @@ -229,7 +229,8 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, } /* Enable memory and I/O accesses, enable bus master */ - pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER); + pci_hose_write_config_word(hose, dev, PCI_COMMAND, + cmdstat | PCI_COMMAND_MASTER); } void pciauto_postscan_setup_bridge(struct pci_controller *hose,