From patchwork Tue Aug 14 11:00:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Lv X-Patchwork-Id: 177227 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 07D772C0096 for ; Tue, 14 Aug 2012 21:19:03 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A359A280E0; Tue, 14 Aug 2012 13:19:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 55MkAy6Qx2bZ; Tue, 14 Aug 2012 13:19:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CC2A2280D6; Tue, 14 Aug 2012 13:19:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 32865280D6 for ; Tue, 14 Aug 2012 13:18:59 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id c8blcycuA-HP for ; Tue, 14 Aug 2012 13:18:58 +0200 (CEST) X-Greylist: delayed 904 seconds by postgrey-1.27 at theia; Tue, 14 Aug 2012 13:18:58 CEST Received: from DB3EHSNDR001.bigfish.com (db3outboundsmtppool1.messaging.microsoft.com [94.245.120.123]) by theia.denx.de (Postfix) with ESMTPS id B0BD6280D4 for ; Tue, 14 Aug 2012 13:18:58 +0200 (CEST) Received: from db3outboundpool.messaging.microsoft.com (10.3.81.229) by DB3EHSNDR001.bigfish.com (10.3.84.15) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 14 Aug 2012 11:03:54 +0000 Received: from mail4-db3-R.bigfish.com (10.3.81.230) by DB3EHSOBE006.bigfish.com (10.3.84.26) with Microsoft SMTP Server id 14.1.225.23; Tue, 14 Aug 2012 11:03:53 +0000 Received: from mail4-db3 (localhost [127.0.0.1]) by mail4-db3-R.bigfish.com (Postfix) with ESMTP id C60DB2E0542 for ; Tue, 14 Aug 2012 11:03:53 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-OUTBOUND-SPAM: yes X-SpamScore: 2 X-BigFish: VS2(zzzz1202h10c0jzz8275bhz2dh87h2a8h668h839hd24he5bhe96hf0ah41h42h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail4-db3 (localhost.localdomain [127.0.0.1]) by mail4-db3 (MessageSwitch) id 1344942232168025_11223; Tue, 14 Aug 2012 11:03:52 +0000 (UTC) Received: from DB3EHSMHS005.bigfish.com (unknown [10.3.81.245]) by mail4-db3.bigfish.com (Postfix) with ESMTP id 1CF4120204 for ; Tue, 14 Aug 2012 11:03:52 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS005.bigfish.com (10.3.87.105) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 14 Aug 2012 11:03:50 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Tue, 14 Aug 2012 06:03:48 -0500 Received: from shlinux3.ap.freescale.net ([10.213.130.145]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q7EB3kwD002338 for ; Tue, 14 Aug 2012 04:03:47 -0700 Received: by shlinux3.ap.freescale.net (Postfix, from userid 1001) id CB9F9232954; Tue, 14 Aug 2012 19:00:06 +0800 (CST) From: Terry Lv To: Date: Tue, 14 Aug 2012 19:00:05 +0800 Message-ID: <1344942005-5305-1-git-send-email-r65388@freescale.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Subject: [U-Boot] [PATCH 4/4] mxc_spi: apply new mxc_spi version configs to other soc configs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list Reply-To: r65388@shlinux3.net List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Apply new mxc_spi version configs to other soc configs. Signed-off-by: Terry Lv --- arch/arm/include/asm/arch-mx31/imx-regs.h | 4 ++++ include/configs/efikamx.h | 4 ++++ include/configs/flea3.h | 3 +++ include/configs/imx31_litekit.h | 5 +++++ include/configs/imx31_phycore.h | 4 ++++ include/configs/mx31ads.h | 4 ++++ include/configs/mx31pdk.h | 4 ++++ include/configs/mx35pdk.h | 8 +++++++- include/configs/mx51evk.h | 4 ++++ include/configs/qong.h | 4 ++++ include/configs/tt01.h | 5 +++++ 11 files changed, 48 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 0147920..4f9c78c 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -24,6 +24,10 @@ #ifndef __ASM_ARCH_MX31_IMX_REGS_H #define __ASM_ARCH_MX31_IMX_REGS_H +#define CSPI1_BASE_ADDR 0x43fa4000 +#define CSPI2_BASE_ADDR 0x50010000 +#define CSPI3_BASE_ADDR 0x53f84000 + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index a07c8b5..1fe558d 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -99,6 +99,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_2_3 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/flea3.h b/include/configs/flea3.h index d88c578..0d85ed5 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -71,6 +71,9 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_7 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR #define CONFIG_MXC_GPIO /* diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 1455ea2..d213ed0 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -69,6 +69,11 @@ #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR + #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 1b75197..f7c2e2d 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -213,6 +213,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_CMD_SPI #define CONFIG_S6E63D6 diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 7e011ae..eff70de 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -65,6 +65,10 @@ #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_MXC_GPIO diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 4253c3e..8210f97 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -67,6 +67,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 32ed609..26eb1d5 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -62,9 +62,15 @@ #define CONFIG_SYS_I2C_MX35_PORT1 #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe -#define CONFIG_MXC_SPI #define CONFIG_MXC_GPIO +/* + * SPI Configs + */ +#define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_7 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR /* * PMIC Configs diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 7c7544f..0c23d04 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -68,6 +68,10 @@ #define CONFIG_CMD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_2_3 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR /* PMIC Controller */ #define CONFIG_PMIC diff --git a/include/configs/qong.h b/include/configs/qong.h index 3346802..d2bc39d 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -56,6 +56,10 @@ #define CONFIG_HW_WATCHDOG #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13XXX diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 6ef25cd..1de0f10 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -151,6 +151,11 @@ #define CONFIG_SYS_MX31_UART2 #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR + #define CONFIG_MXC_GPIO /* MC13783 connected to CSPI3 and SS0 */