@@ -317,14 +317,15 @@ int cpu_init_r(void)
* CPU22 and NMG_CPU_A011 share the same workaround.
* CPU22 applies to P4080 rev 1.0, 2.0, fixed in 3.0
* NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0
- * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1
- * NMG_CPU_A011 is activated by hwconfig with syntax:
- * fsl_cpu_a011:enable
+ * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1, both
+ * fixed in 2.0. NMG_CPU_A011 is activated by default and can
+ * be disabled by hwconfig with syntax:
+ *
+ * fsl_cpu_a011:disable
*/
extern int enable_cpu_a011_workaround;
#ifdef CONFIG_SYS_P4080_ERRATUM_CPU22
- enable_cpu_a011_workaround =
- (SVR_SOC_VER(svr) != SVR_P4080 || SVR_MAJ(svr) < 3);
+ enable_cpu_a011_workaround = (SVR_MAJ(svr) < 3);
#else
char buffer[HWCONFIG_BUFFER_SIZE];
char *buf = NULL;
@@ -332,9 +333,12 @@ int cpu_init_r(void)
if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
- if (hwconfig_arg_cmp_f("fsl_cpu_a011", "enable", buf) > 0) {
+ if (hwconfig_arg_cmp_f("fsl_cpu_a011", "disable", buf) > 0)
+ enable_cpu_a011_workaround = 0;
+ else {
enable_cpu_a011_workaround =
- (SVR_SOC_VER(svr) != SVR_P4080 || SVR_MAJ(svr) < 3);
+ (SVR_SOC_VER(svr) == SVR_P4080 && SVR_MAJ(svr) < 3) ||
+ (SVR_SOC_VER(svr) != SVR_P4080 && SVR_MAJ(svr) < 2);
}
#endif
if (enable_cpu_a011_workaround) {
@@ -359,7 +359,7 @@ __spin_table:
.align L1_CACHE_SHIFT
.global enable_cpu_a011_workaround
enable_cpu_a011_workaround:
- .long 0
+ .long 1
/* Fill in the empty space. The actual reset vector is
* the last word of the page */
This erratum applies to the following SoCs: P4080 rev 1.0, 2.0, fixed in rev 3.0 P2041 rev 1.0, 1.1, fixed in rev 2.0 P3041 rev 1.0, 1.1, fixed in rev 2.0. Workaround for erratum NMG_CPU_A011 is now enabled by default. It can be disabled by hwconfig with syntax: fsl_cpu_a011:disable Signed-off-by: York Sun <yorksun@freescale.com> --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 18 +++++++++++------- arch/powerpc/cpu/mpc85xx/release.S | 2 +- 2 files changed, 12 insertions(+), 8 deletions(-)