From patchwork Thu Jun 14 21:45:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 165020 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C8445B706D for ; Fri, 15 Jun 2012 07:46:07 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7D038280CE; Thu, 14 Jun 2012 23:45:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RBRgYzSumT9R; Thu, 14 Jun 2012 23:45:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2BDB6280D0; Thu, 14 Jun 2012 23:45:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B7CD4280C4 for ; Thu, 14 Jun 2012 23:45:31 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TWe--ZuHyOnm for ; Thu, 14 Jun 2012 23:45:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pz0-f44.google.com (mail-pz0-f44.google.com [209.85.210.44]) by theia.denx.de (Postfix) with ESMTPS id E99AE280BC for ; Thu, 14 Jun 2012 23:45:27 +0200 (CEST) Received: by dacx6 with SMTP id x6so2892403dac.3 for ; Thu, 14 Jun 2012 14:45:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=3ljz1ebTCf+1/yIaOKndiq8PsHyejBLxNpQC9d/2UFo=; b=xGG/wtcz57tXP/W5M09ojmyphrXtNncsU5H8yQWUSP+2aj7Bh1fkwbMYVykoIBxwXl h0hfBrl5aY70BRq4aFQVoJSG9+94kyNyJYYHM37vs1sQAQSdJByxtrtwjDkAHtuPpuM1 ZbpWZn6EEmFxDNG8K9Y0LeDbVOtExT5dsxv0KZkeLaCtz761ojXfsO/ym4vasRVh1gpY NnMyWfbc8HFXIhW1EQcGLb+FY+V069MEfmznM/VMmLU9Iczrcoj0QYr1ONKN4655M27P uHwqQRwZHZ5TmiYXM/1PhLa0MlhIKvgzSy6Gcelv/zwx3F4b06Nj1vdkDGp5g6o6Wiqc DVmA== Received: by 10.68.191.201 with SMTP id ha9mr12645798pbc.75.1339710326084; Thu, 14 Jun 2012 14:45:26 -0700 (PDT) Received: from bill-the-cat.ph.cox.net (ip68-230-54-74.ph.ph.cox.net. [68.230.54.74]) by mx.google.com with ESMTPS id jp3sm10799454pbc.7.2012.06.14.14.45.25 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 14 Jun 2012 14:45:25 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Thu, 14 Jun 2012 14:45:23 -0700 Message-Id: <1339710323-20014-4-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1339710323-20014-1-git-send-email-trini@ti.com> References: <1339700507-26700-1-git-send-email-trini@ti.com> <1339710323-20014-1-git-send-email-trini@ti.com> Cc: Marek Vasut Subject: [U-Boot] [PATCH v2 3/3] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The USB spec says that 32 bytes is the minimum required alignment. However on some platforms we have a larger minimum requirement for cache coherency. In those cases, use that value rather than the USB spec minimum. We add a cpp check to to define USB_DMA_MINALIGN and make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here as we are not allowed to have tests inside of align(...). Cc: Marek Vasut Signed-off-by: Tom Rini --- Changes in v2: - Move test to , expand comment. --- drivers/usb/host/ehci-hcd.c | 13 +++++++------ drivers/usb/musb/musb_core.h | 2 +- include/usb.h | 10 ++++++++++ 3 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 04300be..5a86117 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -29,12 +29,13 @@ #include "ehci.h" -int rootdev; -struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ -volatile struct ehci_hcor *hcor; +int rootdev __attribute__((aligned(USB_DMA_MINALIGN))); +/* R/O registers, not need for volatile */ +struct ehci_hccr *hccr __attribute__((aligned(USB_DMA_MINALIGN))); +volatile struct ehci_hcor *hcor __attribute__((aligned(USB_DMA_MINALIGN))); static uint16_t portreset; -static struct QH qh_list __attribute__((aligned(32))); +static struct QH qh_list __attribute__((aligned(USB_DMA_MINALIGN))); static struct descriptor { struct usb_hub_descriptor hub; @@ -207,8 +208,8 @@ static int ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, int length, struct devrequest *req) { - static struct QH qh __attribute__((aligned(32))); - static struct qTD qtd[3] __attribute__((aligned (32))); + static struct QH qh __attribute__((aligned(USB_DMA_MINALIGN))); + static struct qTD qtd[3] __attribute__((aligned(USB_DMA_MINALIGN))); int qtd_counter = 0; volatile struct qTD *vtd; diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index a8adcce..e914369 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h @@ -145,7 +145,7 @@ struct musb_regs { struct musb_epN_regs epN; } ep[16]; -} __attribute__((packed, aligned(32))); +} __attribute__((packed, aligned(USB_DMA_MINALIGN))); #endif /* diff --git a/include/usb.h b/include/usb.h index 6da91e7..ba3d169 100644 --- a/include/usb.h +++ b/include/usb.h @@ -29,6 +29,16 @@ #include #include +/* + * The EHCI spec says that we must align to at least 32 bytes. However, + * some platforms require larger alignment. + */ +#if ARCH_DMA_MINALIGN > 32 +#define USB_DMA_MINALIGN ARCH_DMA_MINALIGN +#else +#define USB_DMA_MINALIGN 32 +#endif + /* Everything is aribtrary */ #define USB_ALTSETTINGALLOC 4 #define USB_MAXALTSETTING 128 /* Hard limit */