From patchwork Mon Jun 4 15:35:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Sakoman X-Patchwork-Id: 162818 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1F919B6EE7 for ; Tue, 5 Jun 2012 01:35:50 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C7AA428097; Mon, 4 Jun 2012 17:35:48 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lnBdv9qKgmIG; Mon, 4 Jun 2012 17:35:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E060428080; Mon, 4 Jun 2012 17:35:46 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 78C9828080 for ; Mon, 4 Jun 2012 17:35:44 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UfZ2bulBvhpW for ; Mon, 4 Jun 2012 17:35:43 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 3AEA228077 for ; Mon, 4 Jun 2012 17:35:42 +0200 (CEST) Received: by pbcwy7 with SMTP id wy7so5672465pbc.3 for ; Mon, 04 Jun 2012 08:35:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=dAj+bHELtMT0mAD6TaWemS6skVOiYw5K35k2/bNlbmI=; b=iNnZrBSOFWB0fessl4xMmGOhjw3muwdoX18cSXdiVmvAUXZILZ1NpdkNGruX56k1Bn yO+DWTQwFxqG25D7uRLDs4JWn/phmcxthO7g2KYt9Rg/xeBhB7GlOyR6gGmK+Hngl9Sb J9IQESNxG6bWIVIFuoC1UUdLbmWuDXMQxq8qR4vAxrOKv1Srj39qDUT1XEW7ABUF90Wx VK40FIYYtCSbLHa6m0ad/lJ92u6WVK/UDX4QamfyBI81o6nYfvhmjRokFN5UtsygcYwK P5i7hNf8y1zJiAcTTWONYn+tAUuueT+XscDe9T1gwLOVDuyFhx7JJ6CzcTj5lK2YoTog A6zQ== Received: by 10.68.226.193 with SMTP id ru1mr8833231pbc.79.1338824140620; Mon, 04 Jun 2012 08:35:40 -0700 (PDT) Received: from quadra (static-74-41-60-154.dsl1.pco.ca.frontiernet.net. [74.41.60.154]) by mx.google.com with ESMTPS id pe2sm13627946pbc.59.2012.06.04.08.35.38 (version=SSLv3 cipher=OTHER); Mon, 04 Jun 2012 08:35:39 -0700 (PDT) From: Steve Sakoman To: u-boot@lists.denx.de Date: Mon, 4 Jun 2012 08:35:34 -0700 Message-Id: <1338824134-16839-1-git-send-email-steve@sakoman.com> X-Mailer: git-send-email 1.7.1 X-Gm-Message-State: ALoCoQl4ajDaPLUzrQ20mTgLuBTH1yLmgnuv1/lehIAXq1AxWcJNFiaO7GGqLBsSdx9E4oIXo34C Cc: Tom Rini , Steve Sakoman Subject: [U-Boot] [PATCH] omap: am33xx: enable gpio support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch uses the code in omap-common to support gpio modules 1-3 on am33xx based boards. It adds base address and register definitions, enables clocks to the modules, and enables building the common gpio code for CONFIG_AM33XX as well as CONFIG_OMAP Signed-off-by: Steve Sakoman --- arch/arm/cpu/armv7/am33xx/board.c | 10 ++++++++++ arch/arm/cpu/armv7/am33xx/clock.c | 15 +++++++++++++++ arch/arm/cpu/armv7/omap-common/Makefile | 2 +- arch/arm/include/asm/arch-am33xx/cpu.h | 19 +++++++++++++++++++ arch/arm/include/asm/arch-am33xx/gpio.h | 29 +++++++++++++++++++++++++++++ 5 files changed, 74 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-am33xx/gpio.h diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 6b7a494..47ed63c 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,15 @@ struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; +static const struct gpio_bank gpio_bank_am33xx[4] = { + { (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX }, + { (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX }, + { (void *)AM33XX_GPIO2_BASE, METHOD_GPIO_24XX }, + { (void *)AM33XX_GPIO3_BASE, METHOD_GPIO_24XX }, +}; + +const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx; + /* UART Defines */ #ifdef CONFIG_SPL_BUILD #define UART_RESET (0x1 << 1) diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 57bec98..c1fb75c 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -123,6 +123,21 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmper->i2c1clkctrl); while (readl(&cmper->i2c1clkctrl) != PRCM_MOD_EN) ; + + /* gpio1 module */ + writel(PRCM_MOD_EN, &cmper->gpio1clkctrl); + while (readl(&cmper->gpio1clkctrl) != PRCM_MOD_EN) + ; + + /* gpio2 module */ + writel(PRCM_MOD_EN, &cmper->gpio2clkctrl); + while (readl(&cmper->gpio2clkctrl) != PRCM_MOD_EN) + ; + + /* gpio3 module */ + writel(PRCM_MOD_EN, &cmper->gpio3clkctrl); + while (readl(&cmper->gpio3clkctrl) != PRCM_MOD_EN) + ; } static void mpu_pll_config(void) diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 2a6625f..1394c3f 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -29,7 +29,7 @@ SOBJS := reset.o COBJS := timer.o COBJS += utils.o -ifdef CONFIG_OMAP +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP),) COBJS += gpio.o endif diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index be903fb..6ef82dc 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -234,6 +234,25 @@ struct ctrl_stat { unsigned int statusreg; /* ofset 0x40 */ }; +/* AM33XX GPIO registers */ +#define OMAP_GPIO_REVISION 0x0000 +#define OMAP_GPIO_SYSCONFIG 0x0010 +#define OMAP_GPIO_SYSSTATUS 0x0114 +#define OMAP_GPIO_IRQSTATUS1 0x002c +#define OMAP_GPIO_IRQSTATUS2 0x0030 +#define OMAP_GPIO_CTRL 0x0130 +#define OMAP_GPIO_OE 0x0134 +#define OMAP_GPIO_DATAIN 0x0138 +#define OMAP_GPIO_DATAOUT 0x013c +#define OMAP_GPIO_LEVELDETECT0 0x0140 +#define OMAP_GPIO_LEVELDETECT1 0x0144 +#define OMAP_GPIO_RISINGDETECT 0x0148 +#define OMAP_GPIO_FALLINGDETECT 0x014c +#define OMAP_GPIO_DEBOUNCE_EN 0x0150 +#define OMAP_GPIO_DEBOUNCE_VAL 0x0154 +#define OMAP_GPIO_CLEARDATAOUT 0x0190 +#define OMAP_GPIO_SETDATAOUT 0x0194 + void init_timer(void); #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */ diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h b/arch/arm/include/asm/arch-am33xx/gpio.h new file mode 100644 index 0000000..1a211e9 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/gpio.h @@ -0,0 +1,29 @@ +/* + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#ifndef _GPIO_AM33xx_H +#define _GPIO_AM33xx_H + +#include + +#define AM33XX_GPIO0_BASE 0x44E07000 +#define AM33XX_GPIO1_BASE 0x4804C000 +#define AM33XX_GPIO2_BASE 0x481AC000 +#define AM33XX_GPIO3_BASE 0x481AE000 + +#endif /* _GPIO_AM33xx_H */