From patchwork Thu May 3 21:15:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 156779 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DE2A7B6FAC for ; Fri, 4 May 2012 07:31:00 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6FCE72807F; Thu, 3 May 2012 23:30:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UEf+pMsbkSuG; Thu, 3 May 2012 23:30:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B411C28084; Thu, 3 May 2012 23:30:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8DC8628084 for ; Thu, 3 May 2012 23:30:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EdAtMS-67Ms3 for ; Thu, 3 May 2012 23:30:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe004.messaging.microsoft.com [65.55.88.14]) by theia.denx.de (Postfix) with ESMTPS id 081F22807F for ; Thu, 3 May 2012 23:30:48 +0200 (CEST) Received: from mail57-tx2-R.bigfish.com (10.9.14.246) by TX2EHSOBE001.bigfish.com (10.9.40.21) with Microsoft SMTP Server id 14.1.225.23; Thu, 3 May 2012 21:15:32 +0000 Received: from mail57-tx2 (localhost [127.0.0.1]) by mail57-tx2-R.bigfish.com (Postfix) with ESMTP id C415846014F for ; Thu, 3 May 2012 21:15:31 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839hd24he5bh) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail57-tx2 (localhost.localdomain [127.0.0.1]) by mail57-tx2 (MessageSwitch) id 1336079729927678_9885; Thu, 3 May 2012 21:15:29 +0000 (UTC) Received: from TX2EHSMHS024.bigfish.com (unknown [10.9.14.238]) by mail57-tx2.bigfish.com (Postfix) with ESMTP id DC4DE1E03B8 for ; Thu, 3 May 2012 21:15:29 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS024.bigfish.com (10.9.99.124) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 3 May 2012 21:15:29 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.1.355.3; Thu, 3 May 2012 16:15:38 -0500 Received: from localhost.localdomain ([10.214.80.99]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q43LFZhR008991; Thu, 3 May 2012 14:15:37 -0700 From: York Sun To: Date: Thu, 3 May 2012 14:15:34 -0700 Message-ID: <1336079734-12599-4-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1336079734-12599-1-git-send-email-yorksun@freescale.com> References: <1336079734-12599-1-git-send-email-yorksun@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH 4/4] powerpc/mpc85xx: Fix Handling the lack of L2 cache on P2040/P2040E X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Fix SVR checking for commit acf3f8da. Signed-off-by: York Sun --- arch/powerpc/cpu/mpc85xx/release.S | 11 ++++------- 1 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 36c79d3..1860684 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -171,15 +171,12 @@ __secondary_start_page: #ifdef CONFIG_BACKSIDE_L2_CACHE /* skip L2 setup on P2040/P2040E as they have no L2 */ - mfspr r2,SPRN_SVR + mfspr r3,SPRN_SVR + rlwinm r6,r3,24,~0x800 /* clear E bit of SVR */ + lis r3,SVR_P2040@h ori r3,r3,SVR_P2040@l - cmpw r2,r3 - beq 3f - - lis r3,SVR_P2040_E@h - ori r3,r3,SVR_P2040_E@l - cmpw r2,r3 + cmpw r6,r3 beq 3f /* Enable/invalidate the L2 cache */