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[U-Boot] OMAP3: Correct get_sdr_cs_offset mask

Message ID 1326911330-6533-1-git-send-email-trini@ti.com
State Accepted
Commit 0ae056510fa516893ce3cc6c61b4e914f028d9e0
Headers show

Commit Message

Tom Rini Jan. 18, 2012, 6:28 p.m. UTC 
The function get_sdr_cs_offset reads the CS_CFG register in the SDRC
to determine where CS1 is mapped to.  make_cs1_contiguous() will set
CS1 to follow after CS0.  The CS_CFG register has values in bits 9:8
and 3:0 but we had erroneously been testing 5:4 and 3:0 resulting in
incorrect offsets on platforms with less than 128MB as 3:0 describe
128MB hunks and 9:8 describe 32MB offsets after the 128MB hunk.

Tested-by: Grant Erickson <marathon96@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
---
 arch/arm/cpu/armv7/omap3/sdrc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
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Patch

diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index a27b4b1..91f42c0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -102,7 +102,7 @@  u32 get_sdr_cs_offset(u32 cs)
 		return 0;
 
 	offset = readl(&sdrc_base->cs_cfg);
-	offset = (offset & 15) << 27 | (offset & 0x30) << 17;
+	offset = (offset & 15) << 27 | (offset & 0x300) << 17;
 
 	return offset;
 }