From patchwork Tue Nov 8 12:33:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Graeme Russ X-Patchwork-Id: 124341 X-Patchwork-Delegate: graeme.russ@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5A25BB6F84 for ; Tue, 8 Nov 2011 23:34:38 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 644E92995C; Tue, 8 Nov 2011 13:34:19 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I2vqn9ibUdA8; Tue, 8 Nov 2011 13:34:19 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7B83C298A8; Tue, 8 Nov 2011 13:33:56 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B51192955D for ; Tue, 8 Nov 2011 13:33:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F4x15iZm37pH for ; Tue, 8 Nov 2011 13:33:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gx0-f172.google.com (mail-gx0-f172.google.com [209.85.161.172]) by theia.denx.de (Postfix) with ESMTPS id 44ACF297EF for ; Tue, 8 Nov 2011 13:33:43 +0100 (CET) Received: by mail-gx0-f172.google.com with SMTP id v1so470409ggn.3 for ; Tue, 08 Nov 2011 04:33:42 -0800 (PST) Received: by 10.236.22.136 with SMTP id t8mr42400250yht.30.1320755622897; Tue, 08 Nov 2011 04:33:42 -0800 (PST) Received: from localhost.localdomain (d122-104-32-210.sbr6.nsw.optusnet.com.au. [122.104.32.210]) by mx.google.com with ESMTPS id u19sm3948194ank.11.2011.11.08.04.33.40 (version=SSLv3 cipher=OTHER); Tue, 08 Nov 2011 04:33:42 -0800 (PST) From: Graeme Russ To: u-boot@lists.denx.de Date: Tue, 8 Nov 2011 23:33:16 +1100 Message-Id: <1320755603-8695-6-git-send-email-graeme.russ@gmail.com> X-Mailer: git-send-email 1.7.5.2.317.g391b14 In-reply-to: <1320580490-8495-6-git-send-email-graeme.russ@gmail.com> Cc: Graeme Russ Subject: [U-Boot] [PATCH v2 05/12] cosmetic: checkpatch cleanup of board/eNET/*.c X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Graeme Russ --- Changes for v2: - Consolidated patch series board/eNET/eNET.c | 8 ++++---- board/eNET/eNET_pci.c | 19 +++++++++---------- 2 files changed, 13 insertions(+), 14 deletions(-) -- 1.7.5.2.317.g391b14 diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c index c4ed820..429fe1b 100644 --- a/board/eNET/eNET.c +++ b/board/eNET/eNET.c @@ -223,7 +223,7 @@ void setup_pcat_compatibility() * active low polarity on PIC interrupt pins, * active high polarity on all other irq pins */ - writew(0x0000,&sc520_mmcr->intpinpol); + writew(0x0000, &sc520_mmcr->intpinpol); /* * PIT 0 -> IRQ0 @@ -252,7 +252,7 @@ void setup_pcat_compatibility() void enet_timer_isr(void) { - static long enet_ticks = 0; + static long enet_ticks; enet_ticks++; @@ -281,9 +281,9 @@ void hw_watchdog_reset(void) void enet_toggle_run_led(void) { - unsigned char leds_state= inb(LED_LATCH_ADDRESS); + unsigned char leds_state = inb(LED_LATCH_ADDRESS); if (leds_state & LED_RUN_BITMASK) - outb(leds_state &~ LED_RUN_BITMASK, LED_LATCH_ADDRESS); + outb(leds_state & ~LED_RUN_BITMASK, LED_LATCH_ADDRESS); else outb(leds_state | LED_RUN_BITMASK, LED_LATCH_ADDRESS); } diff --git a/board/eNET/eNET_pci.c b/board/eNET/eNET_pci.c index 29d13d2..5af4ef7 100644 --- a/board/eNET/eNET_pci.c +++ b/board/eNET/eNET_pci.c @@ -38,7 +38,7 @@ static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev) CONFIG_SYS_THIRD_PCI_IRQ, CONFIG_SYS_FORTH_PCI_IRQ }; - static int next_irq_index=0; + static int next_irq_index; uchar tmp_pin; int pin; @@ -47,9 +47,8 @@ static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev) pin = tmp_pin; pin -= 1; /* PCI config space use 1-based numbering */ - if (pin == -1) { + if (pin == -1) return; /* device use no irq */ - } /* map device number + pin to a pin on the sc520 */ switch (PCI_DEV(dev)) { @@ -69,19 +68,19 @@ static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev) if (sc520_pci_ints[pin] == -1) { /* re-route one interrupt for us */ - if (next_irq_index > 3) { + if (next_irq_index > 3) return; - } - if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { + + if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) return; - } + next_irq_index++; } - if (-1 != sc520_pci_ints[pin]) { - pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, + if (-1 != sc520_pci_ints[pin]) + pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, sc520_pci_ints[pin]); - } + printf("fixup_irq: device %d pin %c irq %d\n", PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]); }