From patchwork Sun Nov 6 11:54:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Graeme Russ X-Patchwork-Id: 123920 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9D87A1007D2 for ; Sun, 6 Nov 2011 22:55:47 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 34A4228DCA; Sun, 6 Nov 2011 12:55:26 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZFFyt6mO+qZX; Sun, 6 Nov 2011 12:55:25 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 32A9228F23; Sun, 6 Nov 2011 12:55:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3D63028EF6 for ; Sun, 6 Nov 2011 12:55:12 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hdK33UONeerC for ; Sun, 6 Nov 2011 12:55:11 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-iy0-f172.google.com (mail-iy0-f172.google.com [209.85.210.172]) by theia.denx.de (Postfix) with ESMTPS id 0589E28DC7 for ; Sun, 6 Nov 2011 12:55:03 +0100 (CET) Received: by mail-iy0-f172.google.com with SMTP id o4so4712682iae.3 for ; Sun, 06 Nov 2011 03:55:03 -0800 (PST) Received: by 10.42.155.133 with SMTP id u5mr35631585icw.8.1320580503721; Sun, 06 Nov 2011 03:55:03 -0800 (PST) Received: from localhost.localdomain (d122-104-32-210.sbr6.nsw.optusnet.com.au. [122.104.32.210]) by mx.google.com with ESMTPS id 4sm26975559pbj.18.2011.11.06.03.55.01 (version=SSLv3 cipher=OTHER); Sun, 06 Nov 2011 03:55:03 -0800 (PST) From: Graeme Russ To: u-boot@lists.denx.de Date: Sun, 6 Nov 2011 22:54:48 +1100 Message-Id: <1320580490-8495-4-git-send-email-graeme.russ@gmail.com> X-Mailer: git-send-email 1.7.5.2.317.g391b14 In-Reply-To: <1320580490-8495-1-git-send-email-graeme.russ@gmail.com> References: <1320580490-8495-1-git-send-email-graeme.russ@gmail.com> Cc: Graeme Russ Subject: [U-Boot] [PATCH 3/5] cosmetic: checkpatch cleanup arch/x86/cpu/sc520/*.c X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Graeme Russ --- ./checkpatch.pl --no-tree -f arch/x86/cpu/sc520/*.c total: 0 errors, 0 warnings, 66 lines checked arch/x86/cpu/sc520/sc520.c has no obvious style problems and is ready for submission. WARNING: line over 80 characters #84: FILE: x86/cpu/sc520/sc520_pci.c:84: + if (readb(&sc520_mmcr->pci_int_map[i]) == sc520_irq[irq].priority) WARNING: line over 80 characters #90: FILE: x86/cpu/sc520/sc520_pci.c:90: + if (readb(&sc520_mmcr->gp_int_map[i]) == sc520_irq[irq].priority) total: 0 errors, 2 warnings, 140 lines checked arch/x86/cpu/sc520/sc520_pci.c has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 0 warnings, 40 lines checked arch/x86/cpu/sc520/sc520_reset.c has no obvious style problems and is ready for submission. ERROR: need consistent spacing around '%' (ctx:WxV) #433: FILE: x86/cpu/sc520/sc520_sdram.c:433: + movl %eax, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #433: FILE: x86/cpu/sc520/sc520_sdram.c:433: + movl %eax, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #434: FILE: x86/cpu/sc520/sc520_sdram.c:434: + shrl $0x1, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #435: FILE: x86/cpu/sc520/sc520_sdram.c:435: + movl $0x1, %edi ^ ERROR: spaces required around that ':' (ctx:VxE) #436: FILE: x86/cpu/sc520/sc520_sdram.c:436: +memtest0: ^ ERROR: need consistent spacing around '%' (ctx:WxV) #440: FILE: x86/cpu/sc520/sc520_sdram.c:440: + shrl $0x1, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #441: FILE: x86/cpu/sc520/sc520_sdram.c:441: + andl %ecx, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #441: FILE: x86/cpu/sc520/sc520_sdram.c:441: + andl %ecx, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #443: FILE: x86/cpu/sc520/sc520_sdram.c:443: + shll $0x1, %edi ^ ERROR: spaces required around that ':' (ctx:VxE) #446: FILE: x86/cpu/sc520/sc520_sdram.c:446: +set_ecc: ^ ERROR: need consistent spacing around '%' (ctx:WxV) #448: FILE: x86/cpu/sc520/sc520_sdram.c:448: + movl %eax, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #448: FILE: x86/cpu/sc520/sc520_sdram.c:448: + movl %eax, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #449: FILE: x86/cpu/sc520/sc520_sdram.c:449: + xorl %esi, %esi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #449: FILE: x86/cpu/sc520/sc520_sdram.c:449: + xorl %esi, %esi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #450: FILE: x86/cpu/sc520/sc520_sdram.c:450: + xorl %edi, %edi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #450: FILE: x86/cpu/sc520/sc520_sdram.c:450: + xorl %edi, %edi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #451: FILE: x86/cpu/sc520/sc520_sdram.c:451: + xorl %eax, %eax ^ ERROR: need consistent spacing around '%' (ctx:WxV) #451: FILE: x86/cpu/sc520/sc520_sdram.c:451: + xorl %eax, %eax ^ ERROR: need consistent spacing around '%' (ctx:WxV) #452: FILE: x86/cpu/sc520/sc520_sdram.c:452: + shrl $0x2, %ecx ^ ERROR: need consistent spacing around '%' (ctx:WxV) #457: FILE: x86/cpu/sc520/sc520_sdram.c:457: + movb $0x11, %al ^ ERROR: need consistent spacing around '%' (ctx:WxV) #458: FILE: x86/cpu/sc520/sc520_sdram.c:458: + movl $DBCTL, %edi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #459: FILE: x86/cpu/sc520/sc520_sdram.c:459: + movb %al, (%edi) ^ ERROR: need consistent spacing around '%' (ctx:WxV) #462: FILE: x86/cpu/sc520/sc520_sdram.c:462: + movl $ECCINT, %edi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #463: FILE: x86/cpu/sc520/sc520_sdram.c:463: + movb $0x10, %al ^ ERROR: need consistent spacing around '%' (ctx:WxV) #464: FILE: x86/cpu/sc520/sc520_sdram.c:464: + movb %al, (%edi) ^ ERROR: need consistent spacing around '%' (ctx:WxV) #467: FILE: x86/cpu/sc520/sc520_sdram.c:467: + movl $ECCCTL, %edi ^ ERROR: need consistent spacing around '%' (ctx:WxV) #468: FILE: x86/cpu/sc520/sc520_sdram.c:468: + movb $0x05, %al ^ ERROR: need consistent spacing around '%' (ctx:WxV) #469: FILE: x86/cpu/sc520/sc520_sdram.c:469: + movb %al,(%edi) ^ ERROR: space required after that ',' (ctx:VxV) #469: FILE: x86/cpu/sc520/sc520_sdram.c:469: + movb %al,(%edi) ^ ERROR: spaces required around that ':' (ctx:VxE) #471: FILE: x86/cpu/sc520/sc520_sdram.c:471: +out: ^ total: 30 errors, 0 warnings, 532 lines checked arch/x86/cpu/sc520/sc520_sdram.c has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 0 warnings, 93 lines checked arch/x86/cpu/sc520/sc520_ssi.c has no obvious style problems and is ready for submission. total: 0 errors, 0 warnings, 90 lines checked arch/x86/cpu/sc520/sc520_timer.c has no obvious style problems and is ready for submission. arch/x86/cpu/sc520/sc520.c | 2 +- arch/x86/cpu/sc520/sc520_pci.c | 16 +++++++------- arch/x86/cpu/sc520/sc520_ssi.c | 43 +++++++++++++++++++------------------ arch/x86/cpu/sc520/sc520_timer.c | 4 +- 4 files changed, 33 insertions(+), 32 deletions(-) -- 1.7.5.2.317.g391b14 diff --git a/arch/x86/cpu/sc520/sc520.c b/arch/x86/cpu/sc520/sc520.c index 4892c01..3fe85e7 100644 --- a/arch/x86/cpu/sc520/sc520.c +++ b/arch/x86/cpu/sc520/sc520.c @@ -49,7 +49,7 @@ int cpu_init_f(void) asm("movl $0x2000, %%ecx\n" "0: pushl %%ecx\n" "popl %%ecx\n" - "loop 0b\n": : : "ecx"); + "loop 0b\n" : : : "ecx"); return x86_cpu_init_f(); } diff --git a/arch/x86/cpu/sc520/sc520_pci.c b/arch/x86/cpu/sc520/sc520_pci.c index e26793a..70155a1 100644 --- a/arch/x86/cpu/sc520/sc520_pci.c +++ b/arch/x86/cpu/sc520/sc520_pci.c @@ -70,25 +70,23 @@ int pci_sc520_set_irq(int pci_pin, int irq) debug("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq); - if (irq < 0 || irq > 15) { + if (irq < 0 || irq > 15) return -1; /* illegal irq */ - } - if (pci_pin < 0 || pci_pin > 15) { + if (pci_pin < 0 || pci_pin > 15) return -1; /* illegal pci int pin */ - } /* first disable any non-pci interrupt source that use * this level */ /* PCI interrupt mapping (A through D)*/ - for (i=0; i<=3 ;i++) { + for (i = 0; i <= 3 ; i++) { if (readb(&sc520_mmcr->pci_int_map[i]) == sc520_irq[irq].priority) writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[i]); } /* GP IRQ interrupt mapping */ - for (i=0; i<=10 ;i++) { + for (i = 0; i <= 10 ; i++) { if (readb(&sc520_mmcr->gp_int_map[i]) == sc520_irq[irq].priority) writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_int_map[i]); } @@ -102,10 +100,12 @@ int pci_sc520_set_irq(int pci_pin, int irq) if (pci_pin < 4) { /* PCI INTA-INTD */ /* route the interrupt */ - writeb(sc520_irq[irq].priority, &sc520_mmcr->pci_int_map[pci_pin]); + writeb(sc520_irq[irq].priority, + &sc520_mmcr->pci_int_map[pci_pin]); } else { /* GPIRQ0-GPIRQ10 used for additional PCI INTS */ - writeb(sc520_irq[irq].priority, &sc520_mmcr->gp_int_map[pci_pin - 4]); + writeb(sc520_irq[irq].priority, + &sc520_mmcr->gp_int_map[pci_pin - 4]); /* also set the polarity in this case */ tmpw = readw(&sc520_mmcr->intpinpol); diff --git a/arch/x86/cpu/sc520/sc520_ssi.c b/arch/x86/cpu/sc520/sc520_ssi.c index 3a6a858..cc601e5 100644 --- a/arch/x86/cpu/sc520/sc520_ssi.c +++ b/arch/x86/cpu/sc520/sc520_ssi.c @@ -28,37 +28,33 @@ int ssi_set_interface(int freq, int lsb_first, int inv_clock, int inv_phase) { - u8 temp=0; + u8 temp = 0; - if (freq >= 8192) { + if (freq >= 8192) temp |= CTL_CLK_SEL_4; - } else if (freq >= 4096) { + else if (freq >= 4096) temp |= CTL_CLK_SEL_8; - } else if (freq >= 2048) { + else if (freq >= 2048) temp |= CTL_CLK_SEL_16; - } else if (freq >= 1024) { + else if (freq >= 1024) temp |= CTL_CLK_SEL_32; - } else if (freq >= 512) { + else if (freq >= 512) temp |= CTL_CLK_SEL_64; - } else if (freq >= 256) { + else if (freq >= 256) temp |= CTL_CLK_SEL_128; - } else if (freq >= 128) { + else if (freq >= 128) temp |= CTL_CLK_SEL_256; - } else { + else temp |= CTL_CLK_SEL_512; - } - if (!lsb_first) { + if (!lsb_first) temp |= MSBF_ENB; - } - if (inv_clock) { + if (inv_clock) temp |= CLK_INV_ENB; - } - if (inv_phase) { + if (inv_phase) temp |= PHS_INV_ENB; - } writeb(temp, &sc520_mmcr->ssictl); @@ -68,9 +64,11 @@ int ssi_set_interface(int freq, int lsb_first, int inv_clock, int inv_phase) u8 ssi_txrx_byte(u8 data) { writeb(data, &sc520_mmcr->ssixmit); - while (readb(&sc520_mmcr->ssista) & SSISTA_BSY); + while (readb(&sc520_mmcr->ssista) & SSISTA_BSY) + ; writeb(SSICMD_CMD_SEL_XMITRCV, &sc520_mmcr->ssicmd); - while (readb(&sc520_mmcr->ssista) & SSISTA_BSY); + while (readb(&sc520_mmcr->ssista) & SSISTA_BSY) + ; return readb(&sc520_mmcr->ssircv); } @@ -78,15 +76,18 @@ u8 ssi_txrx_byte(u8 data) void ssi_tx_byte(u8 data) { writeb(data, &sc520_mmcr->ssixmit); - while (readb(&sc520_mmcr->ssista) & SSISTA_BSY); + while (readb(&sc520_mmcr->ssista) & SSISTA_BSY) + ; writeb(SSICMD_CMD_SEL_XMIT, &sc520_mmcr->ssicmd); } u8 ssi_rx_byte(void) { - while (readb(&sc520_mmcr->ssista) & SSISTA_BSY); + while (readb(&sc520_mmcr->ssista) & SSISTA_BSY) + ; writeb(SSICMD_CMD_SEL_RCV, &sc520_mmcr->ssicmd); - while (readb(&sc520_mmcr->ssista) & SSISTA_BSY); + while (readb(&sc520_mmcr->ssista) & SSISTA_BSY) + ; return readb(&sc520_mmcr->ssircv); } diff --git a/arch/x86/cpu/sc520/sc520_timer.c b/arch/x86/cpu/sc520/sc520_timer.c index 05bc9c1..495a694 100644 --- a/arch/x86/cpu/sc520/sc520_timer.c +++ b/arch/x86/cpu/sc520/sc520_timer.c @@ -38,7 +38,7 @@ void sc520_timer_isr(void) int timer_init(void) { /* Register the SC520 specific timer interrupt handler */ - register_timer_isr (sc520_timer_isr); + register_timer_isr(sc520_timer_isr); /* Install interrupt handler for GP Timer 1 */ irq_install_handler (0, timer_isr, NULL); @@ -62,7 +62,7 @@ int timer_init(void) writew(100, &sc520_mmcr->gptmr1maxcmpa); writew(0xe009, &sc520_mmcr->gptmr1ctl); - unmask_irq (0); + unmask_irq(0); /* Clear the GP Timer 1 status register to get the show rolling*/ writeb(0x02, &sc520_mmcr->gptmrsta);