@@ -111,6 +111,8 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
#define DAVINCI_MMC_SD0_BASE 0x01d11000
#define DAVINCI_DDR_EMIF_CTRL_BASE 0x20000000
+#define DAVINCI_SPI0_BASE 0x01c66000
+#define DAVINCI_SPI1_BASE 0x01c66800
#elif defined(CONFIG_SOC_DM646X)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000
@@ -78,6 +78,7 @@ struct dv_pll_regs {
#define ARM_PLLDIV (offsetof(struct dv_pll_regs, plldiv2))
#define DDR_PLLDIV (offsetof(struct dv_pll_regs, plldiv7))
+#define SPI_PLLDIV (offsetof(struct dv_pll_regs, plldiv4))
unsigned int davinci_clk_get(unsigned int div);
#endif /* _DV_PLL_DEFS_H_ */
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> --- no changes for v3 arch/arm/include/asm/arch-davinci/hardware.h | 2 ++ arch/arm/include/asm/arch-davinci/pll_defs.h | 1 + 2 files changed, 3 insertions(+), 0 deletions(-)