From patchwork Mon Oct 17 23:46:04 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton staaf X-Patchwork-Id: 120329 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 68572B702E for ; Tue, 18 Oct 2011 10:46:54 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C5BA029143; Tue, 18 Oct 2011 01:46:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1VdaOaYCQwcP; Tue, 18 Oct 2011 01:46:52 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 004CC29123; Tue, 18 Oct 2011 01:46:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E80EF290F8 for ; Tue, 18 Oct 2011 01:46:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MistsjlyK+QV for ; Tue, 18 Oct 2011 01:46:27 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp-out.google.com (smtp-out.google.com [74.125.121.67]) by theia.denx.de (Postfix) with ESMTPS id 1CAA8290D5 for ; Tue, 18 Oct 2011 01:46:24 +0200 (CEST) Received: from hpaq11.eem.corp.google.com (hpaq11.eem.corp.google.com [172.25.149.11]) by smtp-out.google.com with ESMTP id p9HNkJiv012955; Mon, 17 Oct 2011 16:46:19 -0700 Received: from servo.mtv.corp.google.com (servo.mtv.corp.google.com [172.22.72.56]) by hpaq11.eem.corp.google.com with ESMTP id p9HNkFHv027039; Mon, 17 Oct 2011 16:46:16 -0700 Received: by servo.mtv.corp.google.com (Postfix, from userid 99248) id 4189C4A18B; Mon, 17 Oct 2011 16:46:15 -0700 (PDT) From: Anton Staaf To: u-boot@lists.denx.de Date: Mon, 17 Oct 2011 16:46:04 -0700 Message-Id: <1318895173-32634-3-git-send-email-robotboy@chromium.org> X-Mailer: git-send-email 1.7.3.1 In-Reply-To: <1318895173-32634-1-git-send-email-robotboy@chromium.org> References: <1318895173-32634-1-git-send-email-robotboy@chromium.org> X-System-Of-Record: true Cc: Anton Staaf , Jason Jin Subject: [U-Boot] [PATCH v2 02/11] m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Anton Staaf Cc: Mike Frysinger Cc: Lukasz Majewski Cc: Jason Jin --- arch/m68k/include/asm/cache.h | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index 7c84e48..5c9bb30 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h @@ -207,4 +207,14 @@ void dcache_invalid(void); #endif +/* + * m68k uses 16 byte L1 data cache line sizes. Use this for DMA buffer + * alignment unless the board configuration has specified a new value. + */ +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +#else +#define ARCH_DMA_MINALIGN 16 +#endif + #endif /* __CACHE_H */