From patchwork Mon Oct 3 19:18:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 117495 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5372B1007D6 for ; Tue, 4 Oct 2011 06:20:31 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C6AE5282B5; Mon, 3 Oct 2011 21:20:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QMR4jn1TE9wQ; Mon, 3 Oct 2011 21:20:29 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 84B7028212; Mon, 3 Oct 2011 21:20:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C01E02824E for ; Mon, 3 Oct 2011 21:20:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id i23J0oXoYAOn for ; Mon, 3 Oct 2011 21:20:23 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from VA3EHSOBE001.bigfish.com (va3ehsobe001.messaging.microsoft.com [216.32.180.11]) by theia.denx.de (Postfix) with ESMTPS id 6E19C28212 for ; Mon, 3 Oct 2011 21:20:21 +0200 (CEST) Received: from mail176-va3-R.bigfish.com (10.7.14.242) by VA3EHSOBE001.bigfish.com (10.7.40.21) with Microsoft SMTP Server id 14.1.225.22; Mon, 3 Oct 2011 19:20:19 +0000 Received: from mail176-va3 (localhost.localdomain [127.0.0.1]) by mail176-va3-R.bigfish.com (Postfix) with ESMTP id 1ECAC17681F8 for ; Mon, 3 Oct 2011 19:20:19 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 13, Received: from mail176-va3 (localhost.localdomain [127.0.0.1]) by mail176-va3 (MessageSwitch) id 1317669580639160_17161; Mon, 3 Oct 2011 19:19:40 +0000 (UTC) Received: from VA3EHSMHS032.bigfish.com (unknown [10.7.14.244]) by mail176-va3.bigfish.com (Postfix) with ESMTP id 8822C1990154 for ; Mon, 3 Oct 2011 19:18:48 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS032.bigfish.com (10.7.99.42) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 3 Oct 2011 19:18:45 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.7; Mon, 3 Oct 2011 14:18:44 -0500 Received: from localhost.localdomain ([10.214.82.129]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p93JIgLu016701; Mon, 3 Oct 2011 14:18:43 -0500 (CDT) From: York Sun To: Date: Mon, 3 Oct 2011 12:18:39 -0700 Message-ID: <1317669522-19756-1-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH 1/4] powerpc/mpc8536ds: Add eSPI support for MPC8536DS X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Xie Xiaobo 1.The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS, so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width to 4-bit and enable SPI signals. 2.Add eSPI controller and SPI-FLASH definition. Signed-off-by: Xie Xiaobo --- arch/powerpc/include/asm/immap_85xx.h | 5 +++++ board/freescale/mpc8536ds/mpc8536ds.c | 6 ++---- include/configs/MPC8536DS.h | 14 ++++++++++++++ 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index fb5ef91..a29fe35 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1934,7 +1934,12 @@ typedef struct ccsr_gur { u8 res1[8]; u32 gpporcr; /* General-purpose POR configuration */ u8 res2[12]; +#if defined(CONFIG_MPC8536) + u32 gencfgr; /* General Configuration Register */ +#define MPC85xx_GENCFGR_SDHC_WP_INV 0x20000000 +#else u32 gpiocr; /* GPIO control */ +#endif u8 res3[12]; #if defined(CONFIG_MPC8569) u32 plppar1; /* Platform port pin assignment 1 */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index b292e13..2beea34 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2010 Freescale Semiconductor, Inc. + * Copyright 2008-2010, 2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -49,10 +49,8 @@ int board_early_init_f (void) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); setbits_be32(&gur->pmuxcr, - (MPC85xx_PMUXCR_SD_DATA | - MPC85xx_PMUXCR_SDHC_CD | + (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); - #endif return 0; } diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index f3d325a..e892cc1 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -77,6 +77,7 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ +#define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -458,6 +459,19 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 1 /* + * eSPI - Enhanced SPI + */ +#define CONFIG_HARD_SPI +#define CONFIG_FSL_ESPI + +#if defined(CONFIG_SPI_FLASH) +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 +#endif + +/* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */