From patchwork Fri Aug 12 08:24:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?=C5=81ukasz_Majewski?= X-Patchwork-Id: 109789 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BFE09B70B1 for ; Fri, 12 Aug 2011 18:24:29 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CF90128259; Fri, 12 Aug 2011 10:24:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1D5iyLKYMXq4; Fri, 12 Aug 2011 10:24:27 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D13BA2825F; Fri, 12 Aug 2011 10:24:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7E26B2825F for ; Fri, 12 Aug 2011 10:24:23 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JWaQpxFmf0eP for ; Fri, 12 Aug 2011 10:24:21 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) by theia.denx.de (Postfix) with ESMTP id C6F2728259 for ; Fri, 12 Aug 2011 10:24:20 +0200 (CEST) Received: from eu_spt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LPT00EP73CIJC@mailout2.w1.samsung.com> for u-boot@lists.denx.de; Fri, 12 Aug 2011 09:24:19 +0100 (BST) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LPT009X83CHL9@spt1.w1.samsung.com> for u-boot@lists.denx.de; Fri, 12 Aug 2011 09:24:17 +0100 (BST) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id B2BC827005C; Fri, 12 Aug 2011 10:25:42 +0200 (CEST) Date: Fri, 12 Aug 2011 10:24:02 +0200 From: Lukasz Majewski To: u-boot@lists.denx.de Message-id: <1313137442-8378-1-git-send-email-l.majewski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.5.4 Cc: Minkyu Kang , Kyungmin Park , m.szyprowski@samsung.com Subject: [U-Boot] [PATCH] armv7:cache: D cache line size read method X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This commit adds support for reading the D cache line size for armv7 architecture. The get_dcache_line_size() function is supposed to work in conjunction with memalign call to provide D cache aligned DMA buffers. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park CC: Aneesh V CC: Albert ARIBAUD --- arch/arm/cpu/armv7/cache_v7.c | 25 +++++++++++++++++++++++++ include/common.h | 1 + 2 files changed, 26 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 3e1e1bf..bd0b1a8 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -246,6 +246,21 @@ static void v7_inval_tlb(void) CP15ISB; } +/* Read the cache line size (bytes) */ +static int v7_dcache_line_size(void) +{ + u32 ccsidr, log2_line_len; + + ccsidr = get_ccsidr(); + + log2_line_len = ((ccsidr & CCSIDR_LINE_SIZE_MASK) >> + CCSIDR_LINE_SIZE_OFFSET) + 2; + /* Converting from words to bytes */ + log2_line_len += 2; + + return 1 << log2_line_len; +} + void invalidate_dcache_all(void) { v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL); @@ -303,6 +318,11 @@ void flush_cache(unsigned long start, unsigned long size) { flush_dcache_range(start, start + size); } + +int get_dcache_line_size(void) +{ + return v7_dcache_line_size(); +} #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) { @@ -327,6 +347,11 @@ void arm_init_before_mmu(void) void flush_cache(unsigned long start, unsigned long size) { } + +int get_dcache_line_size(void) +{ + return 0; +} #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ #ifndef CONFIG_SYS_ICACHE_OFF diff --git a/include/common.h b/include/common.h index 12a1074..b535300 100644 --- a/include/common.h +++ b/include/common.h @@ -622,6 +622,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_all(void); void invalidate_icache_all(void); +int get_dcache_line_size(void); /* arch/$(ARCH)/lib/ticks.S */ unsigned long long get_ticks(void);