diff mbox

[U-Boot] powerpc/mpc83xx: Rename CONFIG_SYS_DDR_CONFIG to CONFIG_SYS_DDR_CS_CONFIG

Message ID 1313015637-5160-1-git-send-email-joe.hershberger@ni.com
State Superseded
Delegated to: Kim Phillips
Headers show

Commit Message

Joe Hershberger Aug. 10, 2011, 10:33 p.m. UTC 
The register this is written to is named ddr.cs_config, so name the #define similarly to reduce confusion

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
---
 board/freescale/mpc8313erdb/sdram.c       |    2 +-
 board/freescale/mpc8349emds/mpc8349emds.c |    2 +-
 board/freescale/mpc8349itx/mpc8349itx.c   |    2 +-
 board/freescale/mpc8360emds/mpc8360emds.c |    4 ++--
 board/sbc8349/sbc8349.c                   |    2 +-
 board/ve8313/ve8313.c                     |    2 +-
 include/configs/MPC8313ERDB.h             |    2 +-
 include/configs/MPC8349EMDS.h             |    2 +-
 include/configs/MPC8349ITX.h              |    2 +-
 include/configs/MPC8360EMDS.h             |    2 +-
 include/configs/sbc8349.h                 |    2 +-
 include/configs/ve8313.h                  |    2 +-
 12 files changed, 13 insertions(+), 13 deletions(-)

Comments

Wolfgang Denk Oct. 6, 2011, 10:02 p.m. UTC | #1 
Dear Joe Hershberger,

In message <1313015637-5160-1-git-send-email-joe.hershberger@ni.com> you wrote:
> The register this is written to is named ddr.cs_config, so name the #define similarly to reduce confusion
> 
> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>
> Cc: Kim Phillips <kim.phillips@freescale.com>
> ---
>  board/freescale/mpc8313erdb/sdram.c       |    2 +-
>  board/freescale/mpc8349emds/mpc8349emds.c |    2 +-
>  board/freescale/mpc8349itx/mpc8349itx.c   |    2 +-
>  board/freescale/mpc8360emds/mpc8360emds.c |    4 ++--
>  board/sbc8349/sbc8349.c                   |    2 +-
>  board/ve8313/ve8313.c                     |    2 +-
>  include/configs/MPC8313ERDB.h             |    2 +-
>  include/configs/MPC8349EMDS.h             |    2 +-
>  include/configs/MPC8349ITX.h              |    2 +-
>  include/configs/MPC8360EMDS.h             |    2 +-
>  include/configs/sbc8349.h                 |    2 +-
>  include/configs/ve8313.h                  |    2 +-
>  12 files changed, 13 insertions(+), 13 deletions(-)

Checkpatch says:

total: 2 errors, 4 warnings, 98 lines checked

Please clean up and resubmit.  Thanks.


Seems your're trying to break the record for the highest number of
rejects due to never running checkpatch :-(

Best regards,

Wolfgang Denk
Joe Hershberger Oct. 12, 2011, 2:31 a.m. UTC | #2 
On Thu, Oct 6, 2011 at 5:02 PM, Wolfgang Denk <wd@denx.de> wrote:
> Dear Joe Hershberger,
>
> Seems your're trying to break the record for the highest number of
> rejects due to never running checkpatch :-(

Many appologies for neglecting this step.

I've changed all of the include/config/*.h files for mpc83xx targets
to be checkpatch compliant and rebased my patches on that.  Coming
soon...

Again, sorry for the churn that I've caused.  I'll be more diligent in
the future.

-Joe
diff mbox

Patch

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 7aede13..35e3055 100644
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -75,7 +75,7 @@  static long fixed_sdram(void)
 	__udelay(50000);
 
 	im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
-	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;
+	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS_CONFIG;
 
 	/* Currently we use only one CS, so disable the other bank. */
 	im->ddr.cs_config[1] = 0;
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 365ac37..14f6e9f 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -130,7 +130,7 @@  int fixed_sdram(void)
 	im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
 #else
 	im->ddr.csbnds[2].csbnds = 0x0000000f;
-	im->ddr.cs_config[2] = CONFIG_SYS_DDR_CONFIG;
+	im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS_CONFIG;
 
 	/* currently we use only one CS, so disable the other banks */
 	im->ddr.cs_config[0] = 0;
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 5647579..1d69f17 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -59,7 +59,7 @@  int fixed_sdram(void)
 
 	/* Only one CS0 for DDR */
 	im->ddr.csbnds[0].csbnds = 0x0000000f;
-	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;
+	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS_CONFIG;
 
 	debug("cs0_bnds = 0x%08x\n", im->ddr.csbnds[0].csbnds);
 	debug("cs0_config = 0x%08x\n", im->ddr.cs_config[0]);
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index 51d8035..91f4194 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -249,8 +249,8 @@  int fixed_sdram(void)
 	im->ddr.csbnds[0].csbnds = 0x00000007;
 	im->ddr.csbnds[1].csbnds = 0x0008000f;
 
-	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;
-	im->ddr.cs_config[1] = CONFIG_SYS_DDR_CONFIG;
+	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS_CONFIG;
+	im->ddr.cs_config[1] = CONFIG_SYS_DDR_CS_CONFIG;
 
 	im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
 	im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 50fae7c..a67fee1 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -108,7 +108,7 @@  int fixed_sdram(void)
 #warning Currently any ddr size other than 256 is not supported
 #endif
 	im->ddr.csbnds[2].csbnds = 0x0000000f;
-	im->ddr.cs_config[2] = CONFIG_SYS_DDR_CONFIG;
+	im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS_CONFIG;
 
 	/* currently we use only one CS, so disable the other banks */
 	im->ddr.cs_config[0] = 0;
diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 166e459..bf6699d 100644
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -66,7 +66,7 @@  static long fixed_sdram(void)
 	__udelay(50000);
 
 	out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24);
-	out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CONFIG);
+	out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS_CONFIG);
 
 	/* Currently we use only one CS, so disable the other bank. */
 	out_be32(&im->ddr.cs_config[1], 0);
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 92c54d0..78ad565 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -130,7 +130,7 @@ 
  * seem to have the SPD connected to I2C.
  */
 #define CONFIG_SYS_DDR_SIZE		128		/* MB */
-#define CONFIG_SYS_DDR_CONFIG		( CSCONFIG_EN \
+#define CONFIG_SYS_DDR_CS_CONFIG	( CSCONFIG_EN \
 				| 0x00010000 /* TODO */ \
 				| CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 )
 				/* 0x80010102 */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 45b6b5f..a723210 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -126,7 +126,7 @@ 
 #define CONFIG_SYS_DDR_SDRAM_CFG	0x43000000
 #define CONFIG_SYS_DDR_SDRAM_CFG2	0x00401000
 #else
-#define CONFIG_SYS_DDR_CONFIG		(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
+#define CONFIG_SYS_DDR_CS_CONFIG	(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
 #define CONFIG_SYS_DDR_TIMING_1	0x36332321
 #define CONFIG_SYS_DDR_TIMING_2	0x00000800	/* P9-45,may need tuning */
 #define CONFIG_SYS_DDR_CONTROL		0xc2000000	/* unbuffered,no DYN_PWR */
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index de233ff..720b61b 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -202,7 +202,7 @@ 
 
 #ifndef CONFIG_SPD_EEPROM	/* No SPD? Then manually set up DDR parameters */
     #define CONFIG_SYS_DDR_SIZE	256		/* Mb */
-    #define CONFIG_SYS_DDR_CONFIG	(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
+    #define CONFIG_SYS_DDR_CS_CONFIG	(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
 
     #define CONFIG_SYS_DDR_TIMING_1	0x26242321
     #define CONFIG_SYS_DDR_TIMING_2	0x00000800  /* P9-45, may need tuning */
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 49d64a5..63a2a0c 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -144,7 +144,7 @@ 
 #define CONFIG_SYS_DDR_SDRAM_CFG	0x43000000
 #define CONFIG_SYS_DDR_SDRAM_CFG2	0x00401000
 #else
-#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_9)
+#define CONFIG_SYS_DDR_CS_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_9)
 #define CONFIG_SYS_DDR_TIMING_1	0x37344321 /* tCL-tRCD-tRP-tRAS=2.5-3-3-7 */
 #define CONFIG_SYS_DDR_TIMING_2	0x00000800 /* may need tuning */
 #define CONFIG_SYS_DDR_CONTROL		0x42008000 /* Self refresh,2T timing */
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index b418cf2..3067abd 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -114,7 +114,7 @@ 
  * NB: manual DDR setup untested on sbc834x
  */
 #define CONFIG_SYS_DDR_SIZE		256		/* MB */
-#define CONFIG_SYS_DDR_CONFIG		(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
+#define CONFIG_SYS_DDR_CS_CONFIG	(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
 #define CONFIG_SYS_DDR_TIMING_1	0x36332321
 #define CONFIG_SYS_DDR_TIMING_2	0x00000800	/* P9-45,may need tuning */
 #define CONFIG_SYS_DDR_CONTROL		0xc2000000	/* unbuffered,no DYN_PWR */
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index abb57fe..8f5696a 100644
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -79,7 +79,7 @@ 
  * have the SPD connected to I2C.
  */
 #define CONFIG_SYS_DDR_SIZE		128		/* MB */
-#define CONFIG_SYS_DDR_CONFIG		( CSCONFIG_EN \
+#define CONFIG_SYS_DDR_CS_CONFIG	( CSCONFIG_EN \
 				| CSCONFIG_AP \
 				| 0x00040000 /* TODO */ \
 				| CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 )